7477 datasheet(121/354 Pages) RENESAS

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HARDWARE

1-104

7470/7471/7477/7478 GROUP USER’S MANUAL

1.13 Serial I/O

(3) Serial I/O mode register (SM: Address 00DC16)

The Serial I/O mode register selects a state of the clock or port to be used for a data transfer.

Figure 1.13A.9 shows a structure of the Serial I/O mode register.

Fig. 1.13A.9 Structure of Serial I/O mode register

b7 b6 b5 b4 b3 b2 b1 b0

Serial I/O mode register (SM) [Address

At reset

Serial I/O mode register (7470/7471 group)

0, 1

Name

Function

0 0 : f(XIN)/8 or f(XCIN)/8

b1 b0

Internal clock

selection bits

Synchronous clock

selection bit

Serial I/O port

selection bit

SRDY signal output

selection bit

SRDY signal

selection bit

Serial I/O byte specify

mode selection bit

P15/SOUT, SRDY output

structure selection bit

0 1 : f(XIN)/16 or f(XCIN)/16

1 0 : f(XIN)/32 or f(XCIN)/32

1 1 : f(XIN)/512 or f(XCIN)/512

(Note)

0 : External clock

1 : Internal clock

0 : Ordinary I/O port

(P15, P16)

1 : Serial I/O port (SOUT, CLK pin)

0 : Ordinary I/O port(P1 7)

1 : SRDY signal output pin

0 : SRDY signal

1 : SARDY signal

0 : Ordinary mode

1 : Byte specify mode

0 : CMOS output

1 : N-channel open-drain

output

Since the 7470 group is not provided with the sub-clock

generating circuit, do not select f(X

Note:

00DC16]

CIN

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