7477 datasheet(122/354 Pages) RENESAS

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HARDWARE

1-105

7470/7471/7477/7478 GROUP USER’S MANUAL

1.13 Serial I/O

1.13B 7477/7478 group part

1.13B.1 Operation description

The 7477/7478 group incorporates a Serial I/O that permits selecting one of the clock synchronous and

the clock asynchronous. This section describes the operation in each of the clock synchronous serial I/

O and the clock asynchronous Serial I/O (UART).

(1) Clock synchronous Serial I/O

In the clock synchronous Serial I/O, the 8 shift clocks obtained by the clock control circuit are used

as synchronous clocks for transmitting or receiving. The transmit operation of the transmit side and

the receive operation of the receive side are simultaneously executed in synchronization with these

shift clocks.

q The transmit side transmits data bit by bit from the P15/TxD pin in synchronization with the fall of

each shift clock.

q The receive side receives data bit by bit from the P14/RxD pin in synchronization with the rise of

each shift clock.

Figure 1.13B.1 shows a clock synchronous Serial I/O block diagram.

Fig. 1.13B.1 Clock synchronous Serial I/O block diagram

F/F

1/4

P16

P14

P15

P17

TXD

SRDY

SCLK

RXD

XIN

Data bus

Receive

enable bit

(RE)

Serial I/O enable bit

(SIOE)

Address 00E016

Receive buffer register

Receive shift register

Shift clock

Serial I/O control register Address 00E216

Receive buffer full flag (RBF)

Receive interrupt request (RI)

Clock control circuit

Serial I/O synchronous

clock selection bit (SCS)

Clock control circuit

Transmit shift completion flag (TSC)

Transmit interrupt request (TI)

Transmit buffer empty flag (TBE)

Serial I/O status register

Address 00E116

Data bus

Address 00E016

Address 00E416

Transmit buffer register

Transmit shift register

Shift clock

Transmit interrupt source

selection bit (TIC)

Dividing ratio 1/(n+1)

Baud rate generator

SRDY output

enable bit

(SRDY)

BRG count source

selection bit (CSS)

Transmit enable

bit (TE)

Falling

detected

V: The 7477 group is not provided with the X

pin.

XCIN

CIN

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