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7477 Datasheet(PDF) 126 Page - Renesas Technology Corp |
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7477 Datasheet(HTML) 126 Page - Renesas Technology Corp |
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126 / 354 page ![]() HARDWARE 1-109 7470/7471/7477/7478 GROUP USER’S MANUAL 1.13 Serial I/O Fig. 1.13B.3 Transmit timing chart of clock synchronous Serial I/O D0 D1 D2 D3 D4 D5 D6 D7 TXD pin SRDY pin Synchronous clock, BRG divided by 4, or external clock Write signal to transmit buffer register : • Clearing by writing “0” to the transmit interrupt request bit. • Clearing by accepting the transmit interrupt. Transmit buffer empty flag Transmit shift completion flag Transmit interrupt enable bit Transmit interrupt request bit : When interrupt request generation is selected, when the Transmit buffer register becomes empty by clearing the transmit interrupt source selection bit to “0”. : When interrupt request generation is selected, when the shift operation of the transmit shift register is completed by setting the transmit interrupt source selection bit to “1”. A1 A2 B1 B2 B1 A1 B2 A2 B2 B1 |
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