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7477 Datasheet(PDF) 129 Page - Renesas Technology Corp |
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7477 Datasheet(HTML) 129 Page - Renesas Technology Corp |
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129 / 354 page  HARDWARE 1-112 7470/7471/7477/7478 GROUP USER’S MANUAL 1.13 Serial I/O Fig. 1.13B.5 Receive timing chart of clock synchronous serial I/O Fig. 1.13B.4 Receive operation of clock synchronous serial I/O 3 P14/RxD b0 D1 D2 D3 D0 b0 P14/RxD D5 D2 D6 D7 D3 D4 D0 D1 D0 1 2 1 b1 0 4 1 b5 0 Synchronous clock Receive shift register Synchronous clock Receive shift register Synchronous clock Receive buffer register Receive shift register Receive data transfer (Address 00E016) Serial I/O status register (Address 00E116) Interrupt request register 1 (Address 00FC16) D0 D1 D2 D3 D4 D5 D6 A D7 Synchronous clock RxD pin Reading into receive shift register Writing data to transmit shift register SRDY pin Receive buffer register read signal Receive buffer full flag Receive enable bit Receive interrupt request bit • Clearing by writing “0” to the receive interrupt request bit. • Clearing by accepting the receive interrupt. A: |
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