PCM1691 datasheet(17/47 Pages) TI

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AUDIO SERIAL PORT OPERATION

AUDIO DATA INTERFACE FORMATS AND TIMING

LRCK

Ch1(DIN1)orCh3(DIN2)

Ch5(DIN3)orCh7(DIN4)

MSB

LSB

Ch2(DIN1)orCh4(DIN2)

Ch6(DIN3)orCh8(DIN4)

BCK

DIN1/2/3/4

PCM1691

www.ti.com.............................................................................................................................................................................................. SBAS450 – OCTOBER 2008

The PCM1691 audio serial port consists of six signals: BCK, LRCK, DIN1, DIN2, DIN3, and DIN4. BCK is a bit

clock input. LRCK is a left/right word clock or frame synchronization clock input. DIN1 through DIN4 are the

audio data inputs for VOUT1 thorugh VOUT8.

The PCM1691 supports 10 audio data interface formats: 16-/20-/24-/32-bit I2S, 16-/20-/24-/32-bit left-justified,

24-bit right-justified, 16-bit right-justified, 24-bit left-justified mode DSP, 24-bit I2S mode DSP, 24-bit left-justified

mode TDM, 24-bit I2S mode TDM, 24-bit left-justified mode high-speed TDM, and 24-bit I2S mode high-speed

TDM. In the case of I2S, left-justified, and right-justified data formats, 64 BCKs, 48 BCKs, and 32 BCKs per

LRCK period are supported; however, 48 BCKs are limited to 192/384/768 fS SCKI, and 32 BCKs are limited to

16-bit right-justified only. In the case of TDM data format in single rate, BCK, LRCK, and DIN1 are used. In the

case of TDM data format in dual rate, BCK, LRCK, and DIN1/2 are used. In the case of high-speed TDM format

in dual rate, BCK, LRCK, and DIN1 are used. In the case of high-speed TDM format in quad rate, BCK, LRCK,

and DIN1/2 are used. TDM format and high-speed TDM format are supported only at SCKI = 512 fS, 256 fS, 128

fS, and fBCK ≤ fSCKI. The audio data formats are selected by MC/SCL/FMT in hardware control mode and by the

FMTDA[3:0] bits in control register 65 (41h) in software control mode. All data must be in binary twos

complement and MSB first.

Table 5 summarizes the applicable formats and describes the relationships among them and the respective

restrictions with mode control. Figure 22 through Figure 28 show the 10 audio interface data formats.

Table 5. Audio Data Interface Formats and Sampling Rate, Bit Clock, and System Clock Restrictions

CONTROL

MAX LRCK

MODE

FORMAT

DATA BITS

FREQUENCY (fS)

SCKI RATE (xfS)

BCK RATE (xfS)

APPLICABLE PINS

16/20/24/32(1)

192 kHz

128 to 1152(2)

64, 48

DIN1/2/3/4

I2S/Left-Justified

Right-Justified

24, 16

192 kHz

128 to 1152(2)

64, 48, 32 (16 bit)(3)

DIN1/2/3/4

192 kHz

128 to 768

DIN1/2/3/4

I2S/Left-Justified DSP

Software

48 kHz

256, 512

256

DIN1

control

I2S/ Left-Justified TDM

96 kHz

128, 256

128

DIN1/2

96 kHz

256

DIN1

High-Speed

I2S/Left-Justified TDM

192 kHz

128

DIN1/2

16/20/24/32(1)

192 kHz

128 to 1152(2)

64, 48

DIN1/2/3/4

I2S

Hardware

48 kHz

512

256

DIN1

control

I2S TDM

96 kHz

256

128

DIN1/2

(1)

32-bit data length is acceptable only for BCK = 64 fS and when using the I

2S or Left-Justified format.

(2)

1152 fS is acceptable only for fS = 32 kHz, BCK = 64 fS, and when using the I

2S, Left-Justified, or 24-bit Right-Justified formats.

(3)

BCK = 32 fS is supported only for 16-bit data length.

Figure 22. Audio Data Format: 16-/20-/24-/32-Bit I2S

(N = 15/19/23/31, M = 14/18/22/30, and L = 13/17/21/29)

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