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EP2S15 Datasheet(PDF) 74 Page - Altera Corporation

Part # EP2S15
Description  Stratix II Device Family
PDF  238 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP2S15 Datasheet(HTML) 74 Page - Altera Corporation

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2–66
Altera Corporation
Stratix II Device Handbook, Volume 1
May 2007
PLLs & Clock Networks
c4
vv
v
v
v
c5
v
vvv
v
Enhanced PLL 11 outputs
c0
vv
v
v
c1
vv
v
v
c2
vv
v
v
c3
v
vvv
c4
vv
vv
c5
vvv
v
Table 2–11. Global & Regional Clock Connections from Top Clock Pins & Enhanced PLL Outputs
(Part 2
of 2)
Top Side Global & Regional
Clock Network Connectivity
Table 2–12. Global & Regional Clock Connections from Bottom Clock Pins & Enhanced PLL
Outputs
(Part 1 of 2)
Bottom Side Global &
Regional Clock Network
Connectivity
Clock pins
CLK4p
vv
v
v
v
CLK5p
vv
v
v
v
CLK6p
vv
vv
v
CLK7p
v
v
vvv
CLK4n
vvv
CLK5n
vv
v
CLK6n
vv
v
CLK7n
vvv
Drivers from internal logic
GCLKDRV0
v
GCLKDRV1
v
GCLKDRV2
v



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