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EP2S15 Datasheet(PDF) 45 Page - Altera Corporation

Part # EP2S15
Description  Stratix II Device Family
PDF  238 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP2S15 Datasheet(HTML) 45 Page - Altera Corporation

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Altera Corporation
2–37
May 2007
Stratix II Device Handbook, Volume 1
Stratix II Architecture
Figure 2–25. M-RAM Block LAB Row Interface
Note (1)
Note to Figure 2–25:
(1)
Only R24 and C16 interconnects cross the M-RAM block boundaries.
M-RAM Block
Port B
Port A
Row Unit Interface Allows LAB
Rows to Drive Port B Datain,
Dataout, Address and Control
Signals to and from M-RAM Block
Row Unit Interface Allows LAB
Rows to Drive Port A Datain,
Dataout, Address and Control
Signals to and from M-RAM Block
LABs in Row
M-RAM Boundary
LABs in Row
M-RAM Boundary
LAB Interface
Blocks
L0
L1
L2
L3
L4
L5
R0
R1
R2
R3
R4
R5



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