TCM4400EPET datasheet(60/64 Pages) TI

60 / 64 page

TCM4400E

GSM/DCS BASEBAND AND VOICE A/D

AND D/A RF INTERFACE CIRCUIT

SLWS082A – JULY 1999 – REVISED MARCH 2000

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION

baseband uplink register (address 24)

The baseband uplink register (BULCTL) is a 3-bit register (see Table 38) that permits mismatch compensation

in the RF transmit mixer, and 1 bit (OUTLEV) to set the differential output dynamic range (VPP) to 2 times Vref

when OUTLEV = 0 or to 8/15 Vref when OUTLEV = 1. Gain mismatches of 0 dB, –0.25 dB, –0.5 dB, and –0.75

dB are permitted between the I and Q channel as shown in Table 39.

Table 38. Uplink Register BULCTL

BULCTL: BASEBAND UPLINK CONTROL REGISTER

ADDRESS: 24

R/W

RESERVD

OUTLEV

IQSEL

1/0

R=0

R/W

<–ACCESS TYPE

<–VALUE AT RESET

Table 39. BLKCTL Register

BIT2

BIT1

BIT0

GAIN I

GAIN Q

IQSEL

GAIN I

GAIN Q

0 dB

–0.25 dB

0 dB

–0.50 dB

0 dB

–0.75 dB

0 dB

– 0.25 dB

0 dB

–0.50 dB

0 dB

–0.75 dB

power on status register (address 25)

The power-on status register is a 9 bit read-only register which displays the status power-on / power-down of

the functions having several power on/off controls. When the function is in power-on the corresponding bit is

at 1.

Table 40. Power On Register PWONCTL

PWONCTL: POWER-ON STATUS REGISTER

ADDRESS: 25

R/W

RESERVD

BGAPON

VREFON

BBIFON

TIMIFON

VMIDON

AFCON

ADCON

AGCON

APCON

1/0

R=0

<–ACCESS TYPE

<–VALUE AT RESET

TCM4400EPET Datasheet(PDF) 60 Page - Texas Instruments

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