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TCM4400EPET Datasheet(PDF) 33 Page - Texas Instruments |
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TCM4400EPET Datasheet(HTML) 33 Page - Texas Instruments |
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33 / 64 page ![]() TCM4400E GSM/DCS BASEBAND AND VOICE A/D AND D/A RF INTERFACE CIRCUIT SLWS082A – JULY 1999 – REVISED MARCH 2000 33 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PRINCIPLES OF OPERATION voice codec The voice coder/decoder (codec) circuitry processes analog audio components in the uplink path and applies this signal to the voice signal interface for eventual baseband modulation. In the downlink path, the codec circuitry changes voice-component data received from the voice serial interface into analog audio. The following paragraphs describe these uplink/downlink functions in more detail. voice uplink path The voice uplink path includes two input stages; refer to Figure 14. The first stage is a microphone amplifier, compatible with an electret-type microphone, that contains a FET-buffer with an open-drain output, that has a gain of typically 27 dB, and provides an external voltage of 2 V to 2.5 V to bias the microphone. The auxiliary audio input can be used as an alternative source for a higher level speech signal. This stage performs single-ended to differential conversion and provides a gain of 6 dB. When auxiliary audio input is used, the microphone input is disabled and powered down. If both microphone and auxiliary amplifiers are powered up at the same time, only the signal of the microphone amplifier will be transmitted to the voice uplink path. The resulting fully differential signal is fed to a programmable gain amplifier that allows adjustment of the level of the speech signal to the dynamic range of the A/D converter, which is determined by the value of the internal voltage reference. Programmable gain can be set from –12 dB to +12 dB in 1-dB steps. It is programmed with bits VULPG to VULPG4 of VBCTL1 register. Analog-to-digital conversion is made with a third-order sigma-delta modulator whose sampling rate is 1 MHz. Output of the A/D converter is fed to a speech digital filter, which performs the decimation down to 8 KHz and band limits the signal with both low-pass and high-pass transfer functions. The speech samples are then transmitted to the DSP, using the voice serial interface, at a rate of 8 kHz. Programmable functions of the voice uplink path, power-up, input selection and gain are controlled by the DSP or the MCU using the serial interfaces. The uplink voice path can be powered down with the bit VULON of the VBCTL1 internal register. Bias Generator Microphone Amplifier 27 dB PGA + 16.6 – 7.4 dB Auxiliary Amplifier 6 dB Sigma-Delta Modulator fs1 = 1 MHz SINC Filter fs2 = 40 KHz IIR Bandpass Filter fs3 = 8 kHz To Voice Serial Interface MICBIAS MICIP MICIN AUXI Side Tone to Voice Downlink Figure 14. Uplink Path Block Diagram |
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