ST2202A datasheet(33/75 Pages) SITRONIX

33 / 75 page

ST2202A

Ver 2.5

33/75

9/16/2008

TABLE 14-1 Summary Of PSG Registers

Address Name

R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

$010

PSG0L

PSG0[7] PSG0[6] PSG0[5] PSG0[4] PSG0[3]

PSG0[2] PSG0[1] PSG0[0]

0000 0000

$011

PSG0H

PSG0[11] PSG0[10] PSG0[9] PSG0[8]

- - - - 0000

$012

PSG1L

PSG1[7] PSG1[6] PSG1[5] PSG1[4] PSG1[3]

PSG1[2] PSG1[1] PSG1[0]

0000 0000

$013

PSG1H

PSG1[11] PSG1[10] PSG1[9] PSG1[8]

- - - - 0000

PCK[2]

PCK[1]

PCK[0]

PRBS

C1EN

C0EN

DACE=0

- 000 0000

$016

PSGC

PCK[2]

PCK[1]

PCK[0]

DMD[1]

DMD[0]

INH

DACE=1

- 000 0000

$017

VOL

VOL1[3] VOL1[2] VOL1[1] VOL1[0] VOL0[3]

VOL0[2]

VOL0[1] VOL0[0]

0000 0000

TABLE 14-2 PSG Volume Control Register (VOL)

Address Name

R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

$017

VOL

VOL1[3] VOL1[2] VOL1[1] VOL1[0] VOL0[3] VOL0[2] VOL0[1] VOL0[0]

0000 0000

Bit 3~0:

VOL0[3~0] : PSG channel 0 volume control bit

0000 = No sound output

0001 = 1/16 volume

(PSGCK must >= 320K Hz)

0100 = 4/16 volume

1000 = 8/16 volume

1111 = Maximum volume

(PSGCK must >= 20K Hz)

Bit 7~4:

VOL1[3~0] : PSG channel 1 volume control bit

0000 = No sound output

0001 = 1/16 volume

(PSGCK must >= 320K Hz)

0100 = 4/16 volume

1000 = 8/16 volume

1111 = Maximum volume

(PSGCK must >= 20K Hz)

Note: If single channel is enable, then PSG volume control can be double. (16

+ 16 = 32 level volume control)

ST2202A Datasheet(PDF) 33 Page - Sitronix Technology Co., Ltd.

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