ST2202A datasheet(18/75 Pages) SITRONIX

18 / 75 page

ST2202A

Ver 2.5

18/75

9/16/2008

9.1.1 Port-A Interrupt De-bounce

The ST2202 has a hardware de-bounce block for Port-A

interrupt. It is enabled with “1” and disable with “0” of PDBN

(PMCR[6]). The de-bounce function is activated after first

Port-A transition is detected. It uses OSCX as the sampling

clock. The de-bounce time is OSCX x 512 cycles (about 15.6

ms). Data filtered by de-bounce presents a stable state, then

the interrupt can be issued.

TABLE 9-8 Port Miscellaneous Control Register (PMCR)

Address Name

R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

$00F

PMCR

R/W

PULL

PDBN

INTEG

CSM1

CSM0

TO2

TO1

TO0

1000 0000

Bit 6:

PDBN : Enable Port-A interrupt de-bounce

1 = De-bounce for Port-A interrupt

0 = No de-bounce for Port-A interrupt

9.2 External Interrupt

PC0 plays another function of external edge-sensitive interrupt

source. Falling or rising edge is controlled by INTEG(PMCR[5]).

Steps and program example are shown below.

Steps for INTX interrupt operation:

Set PC0 to input mode. (PCC[0])

Set PF0 to “1”

Select edge level. (INTEG)

Clear INTX interrupt request flag. (IRX)

Set INTX interrupt enable bits. (IEX)

Clear CPU interrupt mask flag (I).

Example:

RMB0

<PCC

; Set input mode.

SMB0

<PFC

; Enable INTX function

SMB5

<PMCR

; Rising edge.

RMB0

<IREQ

; Clear IRQ flag.

SMB0

<IENA

; Enable INTX interrupt.

CLI

TABLE 9-9 Port Miscellaneous Control Register (PMCR)

Address Name

R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

$00F

PMCR

R/W

PULL

PDBN

INTEG

CSM1

CSM0

TO2

TO1

TO0

1000 0000

Bit 5:

INTEG : Edge options of external interrupt

1 = External interrupt is rising edge triggered

0 = External interrupt is falling edge triggered

ST2202A Datasheet(PDF) 18 Page - Sitronix Technology Co., Ltd.

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