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ST2202A Datasheet(PDF) 44 Page - Sitronix Technology Co., Ltd. |
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ST2202A Datasheet(HTML) 44 Page - Sitronix Technology Co., Ltd. |
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44 / 75 page ![]() ST2202A Ver 2.5 44/75 9/16/2008 TABLE 16-4 LCD Screen Width Register Address Name R/W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default $043 LXMAX R/W XM[7] XM[6] XM[5] XM[4] XM[3] XM[2] XM[1] XM[0] 0000 0000 Bit 7~0: XM[7:0] : LCD screen width LCD screen width = LXMAX * 8 16.4.4 LCD Screen Height Register The LCD screen height register (LYMAX) is used to specify the weight of the LCD panel in pixels. TABLE 16-5 LCD Screen Height Register Address Name R/W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default $044 LYMAX R/W YM[7] YM[6] YM[5] YM[4] YM[3] YM[2] YM[1] YM[0] 0000 0000 Bit 7~0: YM[7:0] : LCD screen height LCD screen height = LYMAX * 2 16.4.5 LCD Panning Offset Register The LCD panning offset register (LPAN) is used to control how many pixels the picture is shifted to the left. Values from 0 to 7 can be filled into this register to denote the offset, while 0 means no panning control. TABLE 16-6 LCD Panning Offset Register Address Name R/W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default $045 LPAN R/W - - - - - PAN[2] PAN[1] PAN[0] - - - - -000 Bit 2~0: PAN[2:0] : LCD panning offset from zero to 7 pixels max. 16.4.6 LCD Control Register The LCD control register (LCTR) controls the enabling switch of LCDC, display panel on/off or reverse and the PWM contrast control block. TABLE 16-7 LCD Control Register Address Name R/W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default $047 LCTR R/W LPWR BLNK REV - - - - - 100- - - - - Bit 7: LPWR : LCDC enable/disable bit 0 = Enable LCDC ( POFF signal outputs high level) 1 = Disable LCDC ( POFF signal outputs low level) Bit 6: BLNK : LCD display ON/OFF bit 0 = LCD display on ( BLANK signal outputs contrast control signal) 1 = LCD display off ( BLANK signal outputs low level) Bit 5: REV : LCD display reverse 0 = Normal display 1 = Reverse display |
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