ST7032 datasheet(8/63 Pages) SITRONIX

8 / 63 page

ST7032

V1.4

2008/08/18

8/61

Name

Number

I/O Interfaced with

Function

SHLC

ITO option

Common signals direction select:

0:Com1~16←Row address 15~0(Invert)

1:Com1~16←Row address 0~15(Normal)

SHLS

ITO option

Segment signals direction select:

0:Seg1~80←Column address 79~0(Invert)

1:Seg1~80←Column address 0~79(Normal)

COM1 to

COM16

LCD

Common signals that are not used are changed to

non-selection waveform. COM9 to COM16

are non-selection waveforms at 1/8 or 1/9 duty factor

COMI

LCD

ICON common signals

SEG1 to

SEG80

LCD

Segment signals

The built-in voltage follower circuit selection

OPF1

OPF2

Bias select

Built-in voltage follower(only use at EXT=0)

Built-in bias resistor(3.3KΩ) ±30%

Built-in bias resistor(9.6KΩ) ±30%

OPF1

OPF2

ITO option

External bias resistor select

CAP1P

Power supply

CAP1N

Power supply

For voltage booster circuit(VDD-VSS)

External capacitor about 0.1u~4.7uf

VIN

Power supply

Input the voltage to booster

VOUT

Power supply

DC/DC voltage converter. Connect a capacitor between this

terminal and VIN when the built-in booster is used.

V0 to V4

Power supply

Power supply for LCD drive

V0-Vss = 7V (Max)

Built-in/external Voltage follower circuit

VDD

VSS

Power supply

VDD : 2.7V to 5.5V, VSS: 0V

CLS

ITO option

Internal/External oscillation select

0:external clock

1:internal oscillation

OSC1

OSC2

I/O

Oscillation

When the pin input is an external clock, it must be input to

OSC1.

TEST1,2

I/O

Test pin

TEST1,2 must connect to VDD.

ST7032 Datasheet(PDF) 8 Page - Sitronix Technology Co., Ltd.

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