SE97TP datasheet(19/55 Pages) NXP

19 / 55 page

SE97_7

Product data sheet

Rev. 07 — 29 January 2010

19 of 55

NXP Semiconductors

SE97

DDR memory module temp sensor with integrated SPD, 3.3 V

Table 5 is the summary for normal and memory protection instructions.

[1]

The most significant bit, bit 7, is sent first.

[2]

A0, A1, and A2 are compared against the respective external pins on the SE97.

[3]

VI(ov) ranges from 7.8 V to 10 V.

This special EEPROM command consists of a unique 4-bit fixed address (0110b) and the

voltage level applied on the 3-bit hardware address. Normally, to address the memory

array, the 4-bit fixed address is ‘1010b’. To access the memory protection settings, the

4-bit fixed address is ‘0110b’. Figure 17 and Figure 18 show the write and read protection

sequence, respectively.

Up to eight memory devices can be connected on a single I2C-bus. Each one is given a

3-bit on the hardware selectable address (A2, A1, A0) inputs. The device only responds

when the 4-bit fixed and hardware selectable bits are matched. The 8th bit is the

read/write bit. This bit is set to 1 or 0 for read and write protection, respectively.

The corresponding device acknowledges during the ninth bit time when there is a match

on the 7-bit address.

The device does not acknowledge when there is no match on the 7-bit address or when

the device is already in permanent write protection mode and is programmed with any

write protection instructions (i.e., PWP, RWP, CWP).

Table 5.

EEPROM commands summary

Command

Fixed address

Hardware selectable

address

R/W

Bit 7[1]

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Normal EEPROM read/write

1010A2

R/W

Reversible Write Protection (RWP)

0110VSS

VSS

VI(ov)[3]

Clear Reversible Write Protection (CRWP)

0110VSS

VDD

VI(ov)[3]

Permanent Write Protection (PWP)[2]

0110A2

Read RWP

0110VSS

VSS

VI(ov)[3]

Read CRWP

0110VSS

VDD

VI(ov)[3]

Read PWP

0110A2

X = Don’t Care

(1) Refer to Table 6 regarding the exact state of the acknowledge bit.

Fig 17. Software Write Protect (write)

A2 A1 A0

slave address (memory)

START condition

R/W acknowledge(1)

from slave

acknowledge(1)

from slave

dummy byte address

SDA

dummy data

acknowledge(1)

from slave

002aab356

STOP condition

XXXXXXXX

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