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SE97TP Datasheet(PDF) 24 Page - NXP Semiconductors

Part # SE97TP
Description  DDR memory module temp sensor with integrated SPD, 3.3 V
PDF  55 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

SE97TP Datasheet(HTML) 24 Page - NXP Semiconductors

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SE97_7
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 07 — 29 January 2010
24 of 55
NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
8.2 Capability register (00h, 16-bit read-only)
[1]
The SE97 A0 pin can support up to 10 V, but the final die was already taped out before the JC42.4 ballot 1435.00 register change could
be implemented. Bit 5 is changed from ‘0’ to ‘1’ on the future 1.7 V to 3.6 V SE97B.
Table 9.
Capability register (address 00h) bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
RFU
Default
0
000
0000
Access
RRR
RRR
RR
Bit
7
6
5
4
3
2
1
0
Symbol
RFU
VHV
TRES
WRNG
HACC
BCAP
Default
00
0[1]
101
11
Access
RR
RRR
RRR
Table 10.
Capability register (address 00h) bit description
Bit
Symbol
Description
15:6
RFU
Reserved for future use; must be zero.
5
VHV
High voltage standoff for pin A0.
0 — default
1 — This part can support a voltage up to 10 V on the A0 pin to
support JC42.4 ballot 1435.00.
4:3
TRES
Temperature resolution.
10 — 0.125
°C LSB (11-bit)
2
WRNG
Wider range.
1 — can read temperatures below 0
°C and set sign bit accordingly
1
HACC
Higher accuracy (set during manufacture).
1 — B grade accuracy
0
BCAP
Basic capability.
1 — has Alarm and Critical Trips interrupt capability



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