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SE97TP Datasheet(PDF) 20 Page - NXP Semiconductors

Part # SE97TP
Description  DDR memory module temp sensor with integrated SPD, 3.3 V
PDF  55 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

SE97TP Datasheet(HTML) 20 Page - NXP Semiconductors

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SE97_7
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 07 — 29 January 2010
20 of 55
NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
7.10.2.1
Permanent Write Protection (PWP)
If the software write-protection has been set with the PWP instruction, the first 128 bytes
of the memory are permanently write-protected. This write-protection cannot be cleared
by any instruction, or by power-cycling the device. Also, once the PWP instruction has
been successfully executed, the device no longer acknowledges any instruction (with 4-bit
fixed address of 0110b) to access the write-protection settings.
7.10.2.2
Reversible Write Protection (RWP) and Clear Reversible Write Protection (CRWP)
If the software write-protection has been set with the RWP instruction, it can be cleared
again with a CRWP instruction.
The two instructions, RWP and CRWP have the same format as a Byte Write instruction,
but with a different setting for the hardware address pins (as shown in Table 5). Like the
Byte Write instruction, it is followed by an address byte and a data byte, but in this case
the contents are all ‘Don’t Care’ (Figure 17). Another difference is that the voltage, VI(ov),
must be applied on the A0 pin, and specific logical levels must be applied on the other two
(A1 and A2), as shown in Table 5.
X = Don’t Care
(1) Refer to Table 7 regarding the exact state of the acknowledge bit.
Fig 18. Software Write Protect (read)
1
1
0
A2 A1 A0
1
A
S
0
A
slave address (memory)
START condition
R/W acknowledge(1)
from slave
no acknowledge(1)
from slave
dummy byte address
SDA
dummy data
A
no acknowledge(1)
from slave
002aac644
P
STOP condition
XXXXXXXX
XXXXXXXX
Table 6.
Acknowledge when writing data or defining write protection
Instructions with R/W bit = 0.
Status
Instruction
ACK
Address
ACK
Data byte
ACK
Write cycle
(Tcy(W))
Permanently
protected
PWP, RWP or CRWP
NACK
not significant
NACK
not significant
NACK
no
page or byte write in
lower 128 bytes
ACK
address
ACK
data
NACK
no
Protected with
RWP
RWP
NACK
not significant
NACK
not significant
NACK
no
CRWP
ACK
not significant
ACK
not significant
ACK
yes
PWP
ACK
not significant
ACK
not significant
ACK
yes
page or byte write in
lower 128 bytes
ACK
address
ACK
data
NACK
no
Not protected
PWP or RWP
ACK
not significant
ACK
not significant
ACK
yes
CRWP
ACK
not significant
ACK
not significant
ACK
no
page or byte write
ACK
address
ACK
data
ACK
yes



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