Reset Threshold

The MAX793T/MAX795T are intended for 3.3V systems

with a ±5% power-supply tolerance and a 10% systems

tolerance. Except when MR is asserted, reset does not

assert as long as the power supply remains above

3.15V (3.3V - 5%). Reset is guaranteed to assert before

the power supply falls below 3.0V (3.3V - 10%).

The MAX793S/MAX795S are designed for 3.3V ±10%

power supplies. Except when MR is asserted, they are

guaranteed not to assert reset as long as the supply

remains above 3.0V (3.0V is just above 3.3V - 10%).

Reset is guaranteed to assert before the power supply

falls below 2.85V (3.3V - 14%).

The MAX793R/MAX795R are optimized to monitor 3.0V

falls below 2.7V (3.0V - 10%), but is guaranteed to

occur before the supply falls below 2.55V (3.0V - 15%).

Program the MAX794’s reset threshold with an external

voltage divider to RESET IN. The reset-threshold toler-

ance is a combination of the RESET IN tolerance and

the tolerance of the resistors used to make the external

voltage divider. Calculate the reset threshold as follows:

Using the standard application circuit (Figure 3), the

reset threshold can be programmed anywhere in the

Battery Freshness Seal

The MAX793/MAX794’s battery freshness seal discon-

nects the backup battery from internal circuitry until it is

needed. This allows an OEM to ensure that the backup

battery connected to BATT is fresh when the final prod-

uct is put to use. To enable the freshness seal, connect

reset threshold, and hold it there until reset is deassert-

back down again (Figure 4). Once the battery fresh-

ness seal is enabled (disconnecting the backup battery

from the internal circuitry and anything connected to

fere with battery freshness seal operation.

BATT OK Output (MAX793)

BATT OK indicates the status of the backup battery.

When reset is not asserted, the MAX793 checks the

(2.0V min), BATT OK goes low; otherwise, it remains

Watchdog Input (MAX793/MAX794)

In the MAX793/MAX794, the watchdog circuit monitors

the µP’s activity. If the µP does not toggle the watchdog

input (WDI) within 1.6s, WDO goes low. The internal

1.6s timer is cleared and WDO returns high either when

3.0V/3.3V Adjustable Microprocessor

Supervisory Circuits

10

______________________________________________________________________________________

MAX794

RESET

LOWLINE

WDI

CE IN

CE OUT

3.3V

+5V

BATT

RESET IN

A0-A15

MR

+5V SUPPLY

FAILURE

BATT ON

PFI

4.7k

Ω

WDO

OUT

CMOS

RAM

ADDRESS

DECODER

0.1

µF

PMOS

0.1

µF

PFO

GND

I/O

NMI

RESET

0.1

µF

3.6V

R1

D

S

R2

(OPTIONAL)

Si9433DY

SILICONIX

R2

Figure 3. MAX794 Standard Application Circuit

RESET

PFO

(EXTERNALLY HELD AT 0V)

PFO STATE LATCHED,

FRESHNESS SEAL ENABLED.

Figure 4. Battery Freshness Seal Enable Timing