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AMPL138ZCE3 Datasheet(PDF) 116 Page - Texas Instruments |
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AMPL138ZCE3 Datasheet(HTML) 116 Page - Texas Instruments |
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116 / 268 page  DDR2/mDDRMemoryController DDR_D[0:7] DDR_DQM[0] DDR_DQS[0] ODT DQ0-DQ7 BA0-BA2 CK CK DM DQS DQS CS CAS RAS DDR_BA[0:2] CKE BA0-BA2 DDR_A[0:13] DDR_CLKP A0-A13 DDR_CLKN DDR_CS CK CS DDR_CAS DDR_RAS CAS RAS DDR_WE WE DDR_D[8:15] DQS DQ0-DQ7 DDR_DQGATE0 DDR_DQGATE1 T T T T T T T T T T T T T T DDR_ZP VREF DDR_VREF 1K 1% DDR_DVDD18 VREF 1K 1% 0.1 F 0.1 F 0.1 F 0.1 F 0.1 F T Terminator,ifdesired.Seeterminatorcomments. ODT A0-A13 WE VREF CK DDR_CKE CKE T DDR_DQM1 DM T DDR_DQS1 DQS T NC NC (1) OMAP-L138 Low-Power Applications Processor SPRS586A – JUNE 2009 – REVISED AUGUST 2009 www.ti.com (1) See Figure 6-25 for DQGATE routing specifications. Figure 6-19. DDR2/mDDR Dual-Memory High Level Schematic Peripheral Information and Electrical Specifications 116 Submit Documentation Feedback |
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