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LPC1313 Datasheet(PDF) 34 Page - NXP Semiconductors |
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LPC1313 Datasheet(HTML) 34 Page - NXP Semiconductors |
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34 / 62 page ![]() LPC1311_13_42_43 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 3 — 10 August 2010 34 of 62 NXP Semiconductors LPC1311/13/42/43 32-bit ARM Cortex-M3 microcontroller 9.1 BOD static characteristics [1] Interrupt levels are selected by writing the level value to the BOD control register BODCTRL, see LPC13xx user manual. 9.2 Power consumption Power measurements in Active, Sleep, and Deep-sleep modes were performed under the following conditions (see LPC13xx user manual): • Configure all pins as GPIO with pull-up resistor disabled in the IOCONFIG block. • Configure GPIO pins as outputs using the GPIOnDIR registers. • Write 0 to all GPIOnDATA registers to drive the outputs LOW. Table 9. BOD static characteristics[1] Tamb =25 °C. Symbol Parameter Conditions Min Typ Max Unit Vth threshold voltage interrupt level 0 assertion - 1.69 - V de-assertion - 1.84 - V interrupt level 1 assertion - 2.29 - V de-assertion - 2.44 - V interrupt level 2 assertion - 2.59 - V de-assertion - 2.74 - V interrupt level 3 assertion - 2.87 - V de-assertion - 2.98 - V reset level 0 assertion - 1.49 - V de-assertion - 1.64 - V |
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