LPC1313 datasheet(12/62 Pages) NXP

12 / 62 page

LPC1311_13_42_43

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Product data sheet

Rev. 3 — 10 August 2010

12 of 62

NXP Semiconductors

LPC1311/13/42/43

32-bit ARM Cortex-M3 microcontroller

[1]

Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled; IA = inactive, no pull-up/down enabled;

F = floating; floating pins, if not used, should be tied to ground or power to minimize power consumption.

[2]

See Figure 31 for pad characteristics. RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to reset

the chip and wake up from Deep power-down mode.

[3]

5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 30).

[4]

I2C-bus pads compliant with the I2C-bus specification for I2C standard mode and I2C Fast-mode Plus.

[5]

5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.

When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see Figure 30).

[6]

Pad provides USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and Low-speed mode

only).

[7]

When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded

(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.

VDD

3.3 V supply voltage to the internal regulator, the external rail, and the

ADC. Also used as the ADC reference voltage.

XTALIN

6[7]

Input to the oscillator circuit and internal clock generator circuits. Input

voltage must not exceed 1.8 V.

XTALOUT

7[7]

Output from the oscillator amplifier.

VSS

Ground.

Table 3.

LPC1313/43 LQFP48 pin description table …continued

Symbol

Start

logic

input

Type Reset

state

[1]

Description

Table 4.

LPC1311/13/42/43 HVQFN33 pin description table

Symbol

Start

logic

input

Type Reset

state

[1]

Description

RESET/PIO0_0

2[2]

yes

I; PU

RESET — External reset input: A LOW on this pin resets the device,

causing I/O ports and peripherals to take on their default states, and

processor execution to begin at address 0.

I/O

PIO0_0 — General purpose digital input/output pin.

PIO0_1/CLKOUT/

CT32B0_MAT2/

USB_FTOGGLE

3[3]

yes

I/O

I; PU

PIO0_1 — General purpose digital input/output pin. A LOW level on this

pin during reset starts the ISP command handler or the USB device

enumeration (USB on LPC1342/43 only, see description of PIO0_3).

O-

CLKOUT — Clock out pin.

O-

CT32B0_MAT2 — Match output 2 for 32-bit timer 0.

O-

USB_FTOGGLE — USB 1 ms Start-of-Frame signal (LPC1342/43 only).

PIO0_2/SSEL/

CT16B0_CAP0

8[3]

yes

I/O

I; PU

PIO0_2 — General purpose digital input/output pin.

I/O

SSEL — Slave select for SSP.

I-

CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.

PIO0_3/

USB_VBUS

9[3]

yes

I/O

I; PU

PIO0_3 — General purpose digital input/output pin. LPC1342/43 only: A

LOW level on this pin during reset starts the ISP command handler, a

HIGH level starts the USB device enumeration.

I-

USB_VBUS — Monitors the presence of USB bus power (LPC1342/43

only).

PIO0_4/SCL

10[4] yes

I/O

I; IA

PIO0_4 — General purpose digital input/output pin (open-drain).

I/O

SCL — I2C-bus clock input/output (open-drain). High-current sink only if

I2C Fast-mode Plus is selected in the I/O configuration register.

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