LPC1313 datasheet(58/62 Pages) NXP

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LPC1311_13_42_43

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Product data sheet

Rev. 3 — 10 August 2010

58 of 62

NXP Semiconductors

LPC1311/13/42/43

32-bit ARM Cortex-M3 microcontroller

14. Revision history

Table 22.

Revision history

Document ID

Release date

Data sheet status

Change notice Supersedes

LPC1311_13_42_43 v.3

20100810

Product data sheet

LPC1311_13_42_43 v.2

Modifications:

• VESD limit changed to −6500 V (min) /+6500 V (max) in Table 6.

• Reset state of pins and start logic functionality added in Table 3 to Table 4.

• Section 7.18.1 added.

• Table “Power consumption in Deep-sleep mode for individual analog blocks” removed.

• Deep-sleep mode functionality changed to allow BOD and watchdog oscillator as the

only analog blocks allowed to remain running in Deep-sleep mode (Section 7.17.5.2).

• VDD range changed to 3.0 ≤ VDD ≤ 3.6 V in Table 15.

• Tcy(CLK) conditions updated in Table 17.

• Size of GPIO registers updated in Figure 6.

• Editorial updates.

• Template updated.

LPC1311_13_42_43 v.2

20100506

Product data sheet

LPC1311_13_42_43 v.1

20091211

Product data sheet

LPC1313 Datasheet(PDF) 58 Page - NXP Semiconductors