AD5433 datasheet(17/32 Pages) AD

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AD5424/AD5433/AD5445

Rev. B | Page 17 of 32

THEORY OF OPERATION

The AD5424, AD5433, and AD5445 are 8-, 10-, and 12-bit

current output DACs consisting of a standard inverting R-2R

ladder configuration. A simplified diagram for the 8-bit

AD5424 is shown in Figure 48. The matching feedback resistor

RFB has a value of R. The value of R is typically 10 kΩ (mini-

mum 8 kΩ and maximum 12 kΩ). If IOUT1 and IOUT2 are kept at

the same potential, a constant current flows in each ladder leg,

regardless of digital input code. Therefore, the input resistance

presented at VREF is always constant and nominally of resistance

value R. The DAC output (IOUT) is code-dependent, producing

various resistances and capacitances. External amplifier choice

should take into account the variation in impedance generated

by the DAC on the amplifiers inverting input node.

VREF

DAC DATA LATCHES

AND DRIVERS

RFBA

IOUT1

IOUT2

Figure 48. Simplified Ladder

Access is provided to the VREF, RFB, IOUT1, and IOUT2 terminals of

the DAC, making the device extremely versatile and allowing it

to be configured in several different operating modes, for

example, to provide a unipolar output, 4-quadrant multipli-

cation in bipolar mode or in single-supply modes of operation.

Note that a matching switch is used in series with the internal

RFB feedback resistor. If users attempt to measure RFB, power

must be applied to VDD to achieve continuity.

CIRCUIT OPERATION

Unipolar Mode

Using a single op amp, these devices can easily be configured to

provide 2-quadrant multiplying operation or a unipolar output

voltage swing, as shown in Figure 49.

When an output amplifier is connected in unipolar mode, the

output voltage is given by

REF

OUT

−

where D is the fractional representation of the digital word

loaded to the DAC and n is the resolution of the DAC.

D = 0 to 255 (8-bit AD5424)

= 0 to 1023 (10-bit AD5433)

= 0 to 4095 (12-bit AD5445)

Note that the output voltage polarity is opposite to the VREF

polarity for dc reference voltages.

These DACs are designed to operate with either negative or

positive reference voltages. The VDD power pin is only used by

the internal digital logic to drive the DAC switches’ on and

off states.

These DACs are also designed to accommodate ac reference

input signals in the range of –10 V to +10 V.

With a fixed 10 V reference, the circuit shown in Figure 49 gives

a unipolar 0 V to –10 V output voltage swing. When VIN is an ac

signal, the circuit performs 2-quadrant multiplication.

Table 7 shows the relationship between digital code and

expected output voltage for unipolar operation (AD5424,

8-bit device).

Table 7. Unipolar Code Table

Digital Input

Analog Output (V)

1111 1111

–VREF (255/256)

1000 0000

–VREF (128/256) = –VREF/2

0000 0001

VREF (1/256)

0000 0000

VREF (0/256) = 0

VREF

VDD

R/W

IOUT1

IOUT2

RFB

GND

AGND

DATA

INPUTS

VOUT =

0 TO –VREF

R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.

C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED

IF A1 IS A HIGH SPEED AMPLIFIER.

NOTES:

AD5424/

AD5433/

AD5445

Figure 49. Unipolar Operation

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