AD5433 datasheet(3/32 Pages) AD

3 / 32 page

AD5424/AD5433/AD5445

Rev. B | Page 3 of 32

SPECIFICATIONS

VDD = 2.5 V to 5.5 V, VREF = 10 V, IOUT2 = 0 V. Temperature range for Y version: −40°C to +125°C. All specifications TMIN to TMAX, unless

otherwise noted. DC performance measured with OP177and ac performance measured with AD8038, unless otherwise noted.

Table 1.

Parameter

Min

Typ

Max

Unit

Conditions

STATIC PERFORMANCE

AD5424

Resolution

Bits

Relative Accuracy

±0.25

LSB

Differential Nonlinearity

±0.5

LSB

Guaranteed monotonic

AD5433

Resolution

Bits

Relative Accuracy

±0.5

LSB

Differential Nonlinearity

±1

LSB

Guaranteed monotonic

AD5445

Resolution

Bits

Relative Accuracy

±1

LSB

Differential Nonlinearity

–1/+2

LSB

Guaranteed monotonic

Gain Error

±10

Gain Error Temperature Coefficient1

±5

ppm FSR/°C

Output Leakage Current1

±10

Data = 0×0000, TA = 25°C, IOUT1

±20

Data = 0×0000, T = −40°C to +125°C, IOUT1

REFERENCE INPUT1

Reference Input Range

±10

VREF Input Resistance

kΩ

Input resistance TC = –50 ppm/°C

RFB Resistance

kΩ

Input resistance TC = –50 ppm/°C

Input Capacitance

Code Zero Scale

Code Full Scale

DIGITAL INPUTS/OUTPUT1

Input High Voltage, VIH

1.7

Input Low Voltage, VIL

0.6

Output High Voltage, VOH

VDD − 1

VDD = 4.5 V to 5 V, ISOURCE = 200 μA

VDD − 0.5

VDD = 2.5 V to 3.6 V, ISOURCE = 200 μA

Output Low Voltage, VOL

0.4

VDD = 4.5 V to 5 V, ISINK = 200 μA

0.4

VDD = 2.5 V to 3.6 V, ISINK = 200 μA

Input Leakage Current, IIL

μA

Input Capacitance

DYNAMIC PERFORMANCE1

Reference Multiplying Bandwidth

MHz

VREF = ±3.5 V; DAC loaded all 1s

Output Voltage Settling Time

VREF = ±3.5 V, RLOAD = 100 Ω, DAC latch

alternately loaded with 0s and 1s

Measured to ±16 mV of full scale

Measured to ±4 mV of full scale

Measured to ±1 mV of full scale

120

Digital Delay

Interface delay time

10% to 90% Settling Time

Rise and fall time, VREF = 10 V, RLOAD = 100 Ω

Digital-to-Analog Glitch Impulse

nV-s

1 LSB change around major carry, VREF = 0 V

Multiplying Feedthrough Error

DAC latch loaded with all 0s, VREF = ±3.5 V

Reference = 1 MHz

Reference = 10 MHz

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