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AD9650 Datasheet(PDF) 3 Page - Analog Devices |
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AD9650 Datasheet(HTML) 3 Page - Analog Devices |
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3 / 44 page  AD9650 Rev. 0 | Page 3 of 44 SPECIFICATIONS ADC DC SPECIFICATIONS AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.35 V internal reference, DCS disabled, unless otherwise noted. Table 1. AD9650BCPZ-25 AD9650BCPZ-65 AD9650BCPZ-80 AD9650BCPZ-105 Parameter Temp Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit RESOLUTION Full 16 16 16 16 Bits ACCURACY No Missing Codes Full Guaranteed Guaranteed Guaranteed Guaranteed Offset Error Full ±0.2 ±0.5 ±0.2 ±0.5 ±0.4 ±0.70 ±0.4 ±0.7 % FSR Gain Error Full ±0.4 ±2.5 ±0.4 ±2.5 ±0.4 ±2.5 ±0.4 ±2.5 % FSR Differential Nonlinearity (DNL)1 Full −1 +1.3 −1 +1.3 −1 +1.3 −1 +1.3 LSB 25°C ±0.7 ±0.7 ±0.7 ±0.7 LSB Integral Nonlinearity (INL)1 Full ±3 ±5 ±6 ±6 LSB 25°C ±1.6 ±2.5 ±2.5 ±3 LSB MATCHING CHARACTERISTIC Offset Error Full ±0.1 ±0.4 ±0.1 ±0.4 ±0.1 ±0.4 ±0.1 ±0.4 % FSR Gain Error Full ±0.5 ±1.3 ±0.5 ±1.3 ±0.5 ±1.3 ±0.5 ±1.3 % FSR TEMPERATURE DRIFT Offset Error Full ±2 ±2 ±2 ±2 ppm/°C Gain Error Full ±15 ±15 ±15 ±15 ppm/°C INTERNAL VOLTAGE REFERENCE Output Voltage Error (1.35 V Mode) Full ±7 ±14 ±7 ±14 ±7 ±14 ±7 ±14 mV Load Regulation at 1.0 mA Full 10 10 10 10 mV INPUT REFERRED NOISE VREF = 1.35 V 25°C 1.5 1.5 1.5 1.5 LSB rms ANALOG INPUT Input Span, VREF = 1.35 V Full 2.7 2.7 2.7 2.7 V p-p Input Capacitance2 Full 11 11 11 11 pF Input Common-Mode Voltage Full 0.9 0.9 0.9 0.9 V REFERENCE INPUT RESISTANCE Full 6 6 6 6 kΩ POWER SUPPLIES Supply Voltage AVDD Full 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V DRVDD Full 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V Supply Current IAVDD1 Full 125 131 202 209 267 275 332 340 mA IDRVDD1 (1.8 V CMOS) Full 8 23 29 36 mA IDRVDD1 (1.8 V LVDS) Full 72 86 90 100 mA POWER CONSUMPTION DC Input Full 237 254 397 408 522 537 656 675 mW Sine Wave Input1 (DRVDD = 1.8 V CMOS Output Mode) Full 240 405 533 663 mW Sine Wave Input1 (DRVDD = 1.8 V LVDS Output Mode) Full 355 520 642 778 mW Standby Power3 Full 50 50 50 50 mW Power-Down Power Full 0.25 2.5 0.25 2.5 0.25 2.5 0.25 2.5 mW 1 Measured with a low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit. 2 Input capacitance refers to the effective capacitance between one differential input pin and AGND. 3 Standby power is measured with a dc input and with the CLK+ and CLK− pins inactive (set to AVDD or AGND). |
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