AD9650 datasheet(32/44 Pages) AD

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AD9650

Rev. 0 | Page 32 of 44

VOLTAGE REFERENCE

The AD9650 can be configured for a stable 1.35 V internal

reference or a user-applied external reference. The input range

of the ADC always equals twice the voltage at the reference pin

(VREF) for either an internal or an external reference. Table 11

shows a summary of the internal and external reference

connections.

Internal Reference Connection

A stable and accurate 1.35 V reference is built into the AD9650,

allowing a 2.7 V p-p full-scale input. To configure the AD9650

for an internal reference, the SENSE pin must be tied low. In

addition, to achieve optimal noise performance, it is recommended

that the VREF pin be decoupled by 1.0 μF and 0.1 μF capacitors

close to the pin. Figure 83 shows the configuration for the internal

reference connection.

VREF

VSELECT

AD9650

SELECT

LOGIC

0.1µF

1.0µF

VIN–A/VIN–B

VIN+A/VIN+B

ADC

CORE

SENSE

Figure 83. Internal Reference Configuration

If the internal reference of the AD9650 is used to drive multiple

converters to improve gain matching, the loading of the reference

by the other converters must be considered. Figure 84 shows

how the internal reference voltage is affected by loading.

–3.0

–2.5

–2.0

–1.5

–1.0

–0.5

1.2

1.0

0.8

0.6

0.4

0.2

LOAD CURRENT (mA)

Figure 84. Reference Voltage Error vs. Load Current

External Reference Operation

The use of an external reference may be necessary to enhance

the gain accuracy of the ADC or improve thermal drift charac-

teristics. Figure 85 shows the typical drift characteristics of the

internal reference in 1.35 V mode.

When the SENSE pin is tied to AVDD, the internal reference is

disabled, allowing the use of an external reference. An internal

reference buffer loads the external reference with an equivalent

6 kΩ load (see Figure 75). The internal buffer generates the

positive and negative full-scale references for the ADC core.

Therefore, the external reference must be limited to a maximum

of 1.35 V.

–6

–5

–4

–3

–2

–1

–50

–10

–30

TEMPERATURE (°C)

Figure 85. Typical VREF Drift

nce Configur

e (V)

ting VREF (V)

lting Differential Span (V p-p)

Table 11. Refere

ation Summary

Selected Mode

SENSE Voltag

Resul

Resu

Internal Reference

AGND to 0.2

1.35

2.7

External Reference

AVDD

N/A

2 × external reference

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