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82801BA Datasheet(PDF) 14 Page - Intel Corporation

Part # 82801BA
Description  Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile
PDF  498 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82801BA Datasheet(HTML) 14 Page - Intel Corporation

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82801BA ICH2 and 82801BAM ICH2-M
Datasheet
9.1.18 PIRQ[n]_ROUT—PIRQ[E,F,G,H] Routing Control
(LPC I/F—D31:F0) ...........................................................................9-9
9.1.19 D31_ERR_CFG—Device 31 Error Configuration Register
(LPC I/F—D31:F0) .........................................................................9-10
9.1.20 D31_ERR_STS—Device 31 Error Status Register
(LPC I/F—D31:F0) .........................................................................9-10
9.1.21 PCI_DMA_CFG—PCI DMA Configuration (LPC I/F—D31:F0) .....9-11
9.1.22 GEN_CNTL—General Control Register (LPC I/F—D31:F0) .........9-11
9.1.23 GEN_STS—General Status (LPC I/F—D31:F0)............................9-13
9.1.24 RTC_CONF—RTC Configuration Register (LPC I/F—D31:F0).....9-14
9.1.25 COM_DEC—LPC I/F Communication Port Decode Ranges
(LPC I/F—D31:F0) .........................................................................9-14
9.1.26 FDD/LPT_DEC—LPC I/F FDD & LPT Decode Ranges
(LPC I/F—D31:F0) .........................................................................9-15
9.1.27 SND_DEC—LPC I/F Sound Decode Ranges
(LPC I/F—D31:F0) .........................................................................9-15
9.1.28 FWH_DEC_EN1—FWH Decode Enable 1 Register
(LPC I/F—D31:F0) .........................................................................9-16
9.1.29 GEN1_DEC—LPC I/F Generic Decode Range 1
(LPC I/F—D31:F0) .........................................................................9-17
9.1.30 LPC_EN—LPC I/F Enables (LPC I/F—D31:F0) ............................9-17
9.1.31 FWH_SEL1—FWH Select 1 Register (LPC I/F—D31:F0).............9-19
9.1.32 GEN2_DEC—LPC I/F Generic Decode Range 2
(LPC I/F—D31:F0) .........................................................................9-20
9.1.33 FWH_SEL2—FWH Select 2 Register (LPC I/F—D31:F0).............9-20
9.1.34 FWH_DEC_EN2—FWH Decode Enable 2 Register
(LPC I/F—D31:F0) .........................................................................9-21
9.1.35 FUNC_DIS—Function Disable Register (LPC I/F—D31:F0) .........9-22
9.2
DMA I/O Registers......................................................................................9-23
9.2.1
DMABASE_CA—DMA Base and Current Address Registers .......9-24
9.2.2
DMABASE_CC—DMA Base and Current Count Registers...........9-25
9.2.3
DMAMEM_LP—DMA Memory Low Page Registers .....................9-25
9.2.4
DMACMD—DMA Command Register ...........................................9-26
9.2.5
DMASTS—DMA Status Register...................................................9-26
9.2.6
DMA_WRSMSK—DMA Write Single Mask Register.....................9-27
9.2.7
DMACH_MODE—DMA Channel Mode Register...........................9-27
9.2.8
DMA Clear Byte Pointer Register ..................................................9-28
9.2.9
DMA Master Clear Register ...........................................................9-28
9.2.10 DMA_CLMSK—DMA Clear Mask Register ...................................9-28
9.2.11 DMA_WRMSK—DMA Write All Mask Register .............................9-29
9.3
Timer I/O Registers.....................................................................................9-30
9.3.1
TCW—Timer Control Word Register .............................................9-30
9.3.1.1
RDBK_CMD—Read Back Command ............................9-31
9.3.1.2
LTCH_CMD—Counter Latch Command ........................9-31
9.3.2
SBYTE_FMT—Interval Timer Status Byte Format Register ..........9-32
9.3.3
Counter Access Ports Register......................................................9-32
9.4
8259 Interrupt Controller (PIC) Registers ...................................................9-33
9.4.1
Interrupt Controller I/O MAP ..........................................................9-33
9.4.2
ICW1—Initialization Command Word 1 Register ...........................9-34
9.4.3
ICW2—Initialization Command Word 2 Register ...........................9-35
9.4.4
ICW3—Master Controller Initialization Command Word 3
Register .........................................................................................9-35



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