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82801BA Datasheet(PDF) 56 Page - Intel Corporation

Part # 82801BA
Description  Intel 82801BA I/O Controller Hub 2 (ICH2) and Intel 82801BAM I/O Controller Hub 2 Mobile
PDF  498 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82801BA Datasheet(HTML) 56 Page - Intel Corporation

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Power Planes and Pin States
3-4
82801BA ICH2 and 82801BAM ICH2-M Datasheet
IDE Interface
PDA[2:0], SDA[2:0]
Main I/O
PCIRST#
Low
Undefined
Undefined
Driven
Off
Off
PDCS1#, PDCS3#
Main I/O
PCIRST#
High
High
High
High
Off
Off
PDD[15:0], SDD[15:0]
Main I/O
PCIRST#
High-Z
High-Z
Defined
High-Z
Off
Off
PDDACK#, SDDACK#
Main I/O
PCIRST#
High
High
High
Off
Off
Off
PDIOR#, PDIOW#
Main I/O
PCIRST#
High
High
High
Off
Off
Off
SDCS1#, SDCS3#
Main I/O
PCIRST#
High
High
High
Off
Off
Off
SDIOR#, SDIOW#
Main I/O
PCIRST#
High
High
High
Off
Off
Off
Interrupts
PIRQ[A:H]#
Main I/O
PCIRST#
High-Z
High-Z
Defined
High-Z
Off
Off
SERIRQ
Main I/O
PCIRST#
High-Z
High-Z
Running
High-Z
Off
Off
APICD[1:0]
Main I/O
PCIRST#
High-Z
High-Z
Running
High-Z
Off
Off
USB Interface
USBP[3:0][P:N]
Resume I/O
RSMRST#
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Power Management
CPUPERF# (ICH2-M)
Main I/O
PCIRST#
High-Z
High-Z
Defined
Defined
Off
Off
C3_STAT# / GPIO[21]
(ICH2-M)
Main I/O
PCIRST#
High
High
Low
Low
Off
Off
SSMUXSEL (ICH2-M)
Main I/O
PCIRST#
Low
Low
Defined
Defined
Off
Off
SLP_S1# (ICH2-M)
Main I/O
PCIRST#
High
High
High
Low
Low
Low
SLP_S3#
Resume I/O
RSMRST#
High
High
High
High
Low
Low
SLP_S5#
Resume I/O
RSMRST#
High
High
High
High
High
Low
STP_PCI# (ICH2-M)
Main I/O
PCIRST#
High
High
Defined
Low
Low
Low
STP_CPU# (ICH2-M)
Main I/O
PCIRST#
High
High
Low
Low
Low
Low
SUS_STAT#
Resume I/O
RSMRST#
High
High
Low
Low
Low
SUSCLK
Resume I/O
RSMRST#
Running
Processor Interface
A20M#
CPU I/O
PCIRST#
See Note 1
High
Defined
High
Off
Off
CPUPWRGD
Main I/O
PCIRST#
See Note 3
High-Z
High-Z
High-Z
Off
Off
CPUSLP#
CPU I/O
PCIRST#
High
High
High
Defined
(ICH2)
Low (ICH2-M)
Off
Off
IGNNE#
CPU I/O
PCIRST#
See Note 1
High
High
High
Off
Off
INIT#
CPU I/O
PCIRST#
High
High
High
High
Off
Off
INTR
CPU I/O
PCIRST#
See Note 1
Low
Defined
Low
Off
Off
NMI
CPU I/O
PCIRST#
See Note 1
Low
Defined
Low
Off
Off
SMI#
CPU I/O
PCIRST#
High
High
Defined
High
Off
Off
STPCLK#
CPU I/O
PCIRST#
High
High
Low
Low
Off
Off
Table 3-4.
Power Plane and States for Output and I/O Signals (Continued)
Signal Name
Power
Plane
Reset Signal
During Reset
Immediately
after Reset
C3
(ICH2-M)
S1
S3
S4/S5



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