R26 datasheet(170/487 Pages) RENESAS

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R8C/26 Group, R8C/27 Group

14. Timers

Rev.2.10

Sep 26, 2008

Page 151 of 453

REJ09B0278-0210

Figure 14.7

TRAIOC Register in Event Counter Mode

Timer RA I/O Control Register

Symbol

Address

After Reset

TRAIOC

0101h

00h

Bit Symbol

Bit Name

Function

INT1

_____

/TRAIO select bit

0 : INT1

_____

/TRAIO pin (P1_7)

1 : INT1

_____

/TRAIO pin (P1_5)

NOTE:

—

When the same value from the TRAIO pin is sampled three times continuously, the input is determined.

TRAIO output control bit

Set to 0 in event counter mode.

Nothing is assigned. If necessary, set to 0.

When read, the content is 0.

TRAO output enable bit

TRAIO input filter select

bits(1)

b5 b4

0 0 : No filter

0 1 : Filter w ith f1 sampling

1 0 : Filter w ith f8 sampling

1 1 : Filter w ith f32 sampling

TIPF1

—

(b7-b6)

TEDGSEL

TRAIO polarity sw itch bit

TIPF0

TOPCR

b3 b2

b7 b6 b5 b4

0 : Port P3_7

1 : TRAO output

TIOSEL

b1 b0

0 : Starts counting at rising edge of the TRAIO

input or TRAIO starts output at “L”

1 : Starts counting at falling edge of the TRAIO

input or TRAIO starts output at “H”

TOENA

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