SE98ATP datasheet(20/43 Pages) NXP

20 / 43 page

SE98A_4

Product data sheet

Rev. 04 — 25 November 2009

20 of 43

NXP Semiconductors

SE98A

DDR memory module temp sensor, 1.7 V to 3.6 V

EVENT Polarity.

0 — active LOW (default).

1 — active HIGH.

When either of the Critical Trip or Alarm Window lock bits is set, this bit cannot

be altered until unlocked.

EMD

EVENT Mode.

0 — comparator output mode (default)

1 — interrupt mode

When either of the Critical Trip or Alarm Window lock bits is set, this bit cannot

be altered until unlocked.

Table 9.

Configuration register (address 01h) bit description …continued

Bit

Symbol

Description

Table 10.

Hysteresis enable

Action

Below Alarm Window bit (bit 13)

Above Alarm Window bit (bit 14)

Above Critical Trip bit (bit 15)

Temperature

slope

Threshold

temperature

Temperature

slope

Threshold

temperature

Temperature

slope

Threshold

temperature

sets

falling

Ttrip(l) − Thys

rising

Ttrip(u)

rising

Tth(crit)

clears

rising

Ttrip(l)

falling

Ttrip(u) − Thys

falling

Tth(crit) − Thys

Fig 12. Hysteresis: how it works

002aac799

current temperature

time

temperature

set

clear

set

clear

set

clear

Below Alarm Window

(register 05h;

bit 13 = BAW bit)

Above Alarm Window

(register 05h;

bit 14 = AAW bit)

Above Critical Trip

(register 05h;

bit 15 = ACT bit)

lower alarm

threshold

upper alarm

threshold

critical alarm

threshold

hysteresis

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