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LPC1786 Datasheet(PDF) 87 Page - NXP Semiconductors |
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LPC1786 Datasheet(HTML) 87 Page - NXP Semiconductors |
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87 / 117 page ![]() LPC178X_7X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Objective data sheet Rev. 2 — 27 May 2011 87 of 117 NXP Semiconductors LPC178x/7x 32-bit ARM Cortex-M3 microcontroller 11.5 I/O pins [1] Applies to standard port pins and RESET pin. 11.6 SSP interface Conditions: Frequency values are typical values. 12 MHz 1 % accuracy is guaranteed for 2.7 V V DD(3V3) 3.6 V and Tamb = 40 C to +85 C. Variations between parts may cause the IRC to fall outside the 12 MHz 1 % accuracy specification for voltages below 2.7 V. Fig 21. Internal RC oscillator frequency versus temperature X (X) X X X XX 001aac984 X X X X X X (X) X <tbd> Table 21. Dynamic characteristic: I/O pins[1] Tamb = 40 C to +85 C; VDD(3V3) over specified ranges. Symbol Parameter Conditions Min Typ Max Unit tr rise time pin configured as output 3.0 - 5.0 ns tf fall time pin configured as output 2.5 - 5.0 ns Table 22. Dynamic characteristics: SSP pins in SPI mode Tamb = 40 C to 85 C, VDD(REG)(3V3) = 3.0 V to 3.6 V. Values guaranteed by design. Symbol Parameter Conditions Min Typ Max Unit SSP master Tcy(clk) clock cycle time full-duplex mode [1] 30 25 - ns when only transmitting 30 25 - ns tDS data set-up time in SPI mode [2] 14.8 10.5 - ns tDH data hold time in SPI mode [2] 21 - ns tv(Q) data output valid time in SPI mode [2] -4.0 6.3 ns th(Q) data output hold time in SPI mode [2] 2.4 0.2 - ns SSP slave Tcy(PCLK) PCLK cycle time 10 ns |
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