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LPC1786 Datasheet(PDF) 89 Page - NXP Semiconductors |
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LPC1786 Datasheet(HTML) 89 Page - NXP Semiconductors |
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89 / 117 page ![]() LPC178X_7X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Objective data sheet Rev. 2 — 27 May 2011 89 of 117 NXP Semiconductors LPC178x/7x 32-bit ARM Cortex-M3 microcontroller 11.7 I2C-bus Fig 23. SSP slave timing in SPI mode SCK (CPOL = 0) MOSI MISO Tcy(clk) tclk(H) tclk(L) tDS tDH tv(Q) DATA VALID DATA VALID th(Q) SCK (CPOL = 1) DATA VALID DATA VALID MOSI MISO tDS tDH tv(Q) DATA VALID DATA VALID th(Q) DATA VALID DATA VALID CPHA = 1 CPHA = 0 002aae830 Table 23. Dynamic characteristic: I2C-bus pins[1] Tamb = 40 C to +85 C.[2] Symbol Parameter Conditions Min Max Unit fSCL SCL clock frequency Standard-mode 0 100 kHz Fast-mode 0 400 kHz Fast-mode Plus 0 1 MHz tf fall time [4][5][6][7] of both SDA and SCL signals Standard-mode - 300 ns Fast-mode 20 + 0.1 C b 300 ns Fast-mode Plus - 120 ns tLOW LOW period of the SCL clock Standard-mode 4.7 - s Fast-mode 1.3 - s Fast-mode Plus 0.5 - s tHIGH HIGH period of the SCL clock Standard-mode 4.0 - s Fast-mode 0.6 - s Fast-mode Plus 0.26 - s |
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