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ADS4128 Datasheet(PDF) 17 Page - Texas Instruments |
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ADS4128 Datasheet(HTML) 17 Page - Texas Instruments |
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17 / 61 page  CLKOUT Output Data Dn (1) Dn CL M K CL P K Output Clock Input Clock Output Data Dn (1) Dn t START CL M K CL P K Input Clock t DV t SU t H t PDI CLKOUTP CLKOUTM Output DataPair Dn (1) Dn+1 (1) Dn_Dn+1_P Dn_Dn+1_M CL M K CL P K Output Clock Input Clock t SU t H t SU t H t PDI ADS4128 www.ti.com SBAS578 – MAY 2012 (1) Dn = bits D0, D2, D4, and so on. Dn + 1 = bits D1, D3, D5, and so on. Figure 6. LVDS Mode Timing Dn = bits D0, D1, D2, and so on. Figure 7. CMOS Mode Timing Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 17 Product Folder Link(s): ADS4128 |
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