| Electronic Components Datasheet Search |
|
WM8351 Datasheet(PDF) 311 Page - Wolfson Microelectronics plc |
|
|
|||||||||||||||||||||||||||||
WM8351 Datasheet(HTML) 311 Page - Wolfson Microelectronics plc |
|
311 / 330 page ![]() Production Data WM8351 w PD, April 2012, Rev 4.5 311 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R226 (E2h) Charger Overides/status 15 CHG_BATT_HOT_OVRDE 0 Readback of the raw signal value. Allow direct control of this signal's input to the debounce logic when the ANALOG_OVRDE bit is set to 1. 14 CHG_BATT_COLD_OVRDE 0 Readback of the raw signal value. Allow direct control of this signal's input to the debounce logic when the ANALOG_OVRDE bit is set to 1. 11 CHG_END_OVRDE 0 Readback of the raw signal value. Allow direct control of this signal's input to the debounce logic when the ANALOG_OVRDE bit is set to 1. 2 CHG_BATT_LT_3P9_OVRDE 0 Readback of the raw signal value. Allow direct control of this signal's input to the debounce logic when the ANALOG_OVRDE bit is set to 1. 1 CHG_BATT_LT_3P1_OVRDE 0 Readback of the raw signal value. Allow direct control of this signal's input to the debounce logic when the ANALOG_OVRDE bit is set to 1. 0 CHG_BATT_LT_2P85_OVRDE 0 Readback of the raw signal value. Allow direct control of this signal's input to the debounce logic when the ANALOG_OVRDE bit is set to 1. Register E2h Charger Overides/status REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R227 (E3h) misc overrides 12 CS1_NOT_REG_OVRDE 0 Readback of the raw signal value. Allow direct control of this signal's input to the debounce logic when the ANALOG_OVRDE bit is set to 1. 10 USB_LIMIT_OVRDE 0 Readback of the raw signal value. Allow direct control of this signal's input to the debounce logic when the ANALOG_OVRDE bit is set to 1. 7 AUX_DCOMP4_OVRDE 0 Readback of the raw signal value. Allow direct control of this signal's input to the debounce logic when the ANALOG_OVRDE bit is set to 1. 6 AUX_DCOMP3_OVRDE 0 Readback of the raw signal value. Allow direct control of this signal's input to the debounce logic when the ANALOG_OVRDE bit is set to 1. 5 AUX_DCOMP2_OVRDE 0 Readback of the raw signal value. Allow direct control of this signal's input to the debounce logic when the ANALOG_OVRDE bit is set to 1. 4 AUX_DCOMP1_OVRDE 0 Readback of the raw signal value. Allow direct control of this signal's input to the debounce logic when the ANALOG_OVRDE bit is set to 1. 3 HYST_UVLO_OK_OVRDE 0 Readback of the raw signal value. Allow direct control of this signal's input to the debounce logic when the ANALOG_OVRDE |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |