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AD9142BCPZ Datasheet(PDF) 45 Page - Analog Devices |
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AD9142BCPZ Datasheet(HTML) 45 Page - Analog Devices |
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45 / 65 page ![]() Data Sheet AD9142 Rev. 0 | Page 45 of 64 INTERRUPT FLAG0 REGISTER Address: 0x05, Reset: 0x00, Name: INTERRUPT_FLAG0 Table 27. Bit Descriptions for INTERRUPT_FLAG0 Bits Bit Name Settings Description Reset Access 6 SYNC_LOST SYNC_LOST is set to 1 when sync is lost. 0x0 R 5 SYNC_LOCKED SYNC_LOCKED is set to 1 when sync is locked. 0x0 R 4 SYNC_DONE SYNC_DONE is set to 1 when sync is done. 0x0 R 3 PLL_LOST PLL_LOST is set to 1 when PLL loses lock. 0x0 R 2 PLL_LOCKED PLL_LOCKED is set to 1 when PLL is locked. 0x0 R 1 OVER_THRESHOLD OVER_THRESHOLD is set to 1 when input power is overthreshold. 0x0 R 0 DACOUT_MUTED DACOUT_MUTED is set to 1 when the DAC output is muted (midscale dc). 0x0 R INTERRUPT FLAG1 REGISTER Address: 0x06, Reset: 0x00, Name: INTERRUPT_FLAG1 Table 28. Bit Descriptions for INTERRUPT_FLAG1 Bits Bit Name Settings Description Reset Access 2 FIFO_UNDERFLOW FIFO_UNDERFLOW is set to 1 when the FIFO read pointer catches the FIFO write pointer. 0x0 R 1 FIFO_OVERFLOW FIFO_OVERFLOW is set to 1 when the FIFO write pointer catches the FIFO read pointer. 0x0 R 0 FIFO_WARNING FIFO_WARNING is set to 1 when the FIFO is one slot from empty (≤1) or full (≥6). 0x0 R INTERRUPT SELECT0 REGISTER Address: 0x07, Reset: 0x00, Name: IRQ_SEL0 Table 29. Bit Descriptions for IRQ_SEL0 Bits Bit Name Settings Description Reset Access 6 SEL_SYNC_LOST 0 Selects the IRQ1 pin. 0x0 RW 1 Selects the IRQ2 pin. 5 SEL_SYNC_LOCKED 0 Selects the IRQ1 pin. 0x0 RW 1 Selects the IRQ2 pin. 4 SEL_SYNC_DONE 0 Selects the IRQ1 pin. 0x0 RW 1 Selects the IRQ2 pin. 3 SEL_PLL_LOST 0 Selects the IRQ1 pin. 0x0 RW 1 Selects the IRQ2 pin. 2 SEL_PLL_LOCKED 0 Selects the IRQ1 pin. 0x0 RW 1 Selects the IRQ2 pin. 1 SEL_OVER_THRESHOLD 0 Selects the IRQ1 pin. 0x0 RW 1 Selects the IRQ2 pin. 0 SEL_DACOUT_MUTED 0 Selects the IRQ1 pin. 0x0 RW 1 Selects the IRQ2 pin. |
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