AD9142BCPZ datasheet(22/65 Pages) AD

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AD9142

Data Sheet

Rev. 0 | Page 22 of 64

INTERFACE DELAY LINE

A four-tap delay line is provided for the user to adjust the

timing between the data bus and the DCI. Table 13 specifies the

setup and hold times for each delay tap.

There is a fixed 1.9 ns delay on the DCI when the delay line is

enabled. Each tap adds a nominal delay of 300 ps to the fixed

delay. To achieve the best timing margin, that is, to center the

setup and hold window in the middle of the data eye, the user

may need to add a delay on the data bus with respect to the DCI

in the data source. Figure 36 is an example of calculating the

optimal external delay.

Table 13. Setup and Hold Times

Delay Setting

0x00

0x07

0x7F

0xFF

0x0

0x5

tS (ns)1

−1.25

−1.50

−1.70

−1.93

tH (ns)

2.51

2.82

3.23

3.64

|tS + tH| (ns)

1.26

1.32

1.53

1.71

The negative sign indicates the direction of the setup time. The setup time is

defined as positive when it is on the left side of the clock edge and negative

when it is on the right side of the clock edge.

Interface Timing Requirements

The following example illustrates how to calculate the optimal

delay at the data source to achieve the best sampling timing in

the delay line-based mode:

•

fDCI = 200 MHz

•

Delay setting = 0

The shadow area in Figure 36 is the interface setup and hold

time window set to 0. To optimize the interface timing, this

window must be placed in the middle of the data transitions.

Because the input is double data rate, the available data period

is 2.5 ns. Therefore, the optimal data bus delay, with respect to

the DCI at the data source, can be calculated as

−

PERIOD

DATA

DELAY

SPI Sequence to Enable Delay Line-Based Mode

It is recommended that the following SPI sequence be used to

enable the delay line-based mode:

1. 0x79 → 0x18 /* Configure Data Interface */

2. 0x5E → 0x00 /* Delay setting 0 */

0x5F → 0x00

3. 0x5F[3] → 1b /* Enable the delay line */

Figure 36. Example of Interfacing Timing in the Delay Line-Based Mode

DATA EYE

NO DATA TRANSITION

INPUT DATA [15:0]

WITH OPTIMIZED DELAY

DCI = 200MHz

tDELAY = 0.63ns

tDATA PERIOD = 2.5ns

|tS| = 1.25ns

|tH| = 2.51ns

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