PIC14000 datasheet(57/153 Pages) MICROCHIP

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Preliminary

DS40122B-page 57

PIC14000

8.0

ANALOG MODULES FOR A/D

CONVERSION

8.1

Overview

The PIC14000 includes analog components to create a

slope A/D converter including:

• Comparator

• 4-bit programmable current source

• 16-channel analog mux

• 16-bit timer with capture register

Each channel is converted independently by means of

a slope conversion method using a single precision

comparator. The programmable current source feeds

an external 0.1

µF (nominal) capacitor to generate the

ramp voltage used in the conversion.

8.2

Conversion Process

These are the steps to perform data conversion:

• Clear REFOFF (SLPCON<5>) and ADOFF

(SLPCON<0>) bits to enable the A/D module.

• Initialize ADCON1<7:4> to initialize the program-

mable current source.

• Set ADRST (ADCON0<1>), for a minimum of 200

µs to stop the timer and fully discharge the ramp

capacitor to ground.

• The A/D timer (ADTMR) increments from 0000h

to FFFFh and must be initialized before each con-

version.

• To start a conversion, clear ADRST through soft-

ware, it will allow the timer to begin counting and

the ramp capacitor to begin charging.

• When the ramp voltage exceeds the analog input,

the comparator output changes from high to low.

• This transition causes a capture event and copies

the current A/D timer value into the 16-bit capture

• An interrupt is generated to the CPU if enabled.

Note:

The A/D timer continues to run following a

capture event.

The maximum A/D timer count is 65,536. It can be

clocked by the on-chip or external oscillator. At a 4 MHz

oscillation frequency, the maximum conversion time is

16.38 ms for a full count. A typical conversion should

complete before full-count is reached. A timer overﬂow

ﬂag is set once the timer rolls over (FFFFh to 0000h),

and an interrupt is sent to the CPU, if enabled.

End-user calibration is simpliﬁed or eliminated by mak-

ing use of the on-chip EPROM. Internal component val-

ues are measured at factory ﬁnal test and stored in the

memory for use by the application ﬁrmware.

Periodic conversion cycles should be performed on the

bandgap

and

slope

references

(described

Section 9.0) to compensate for A/D component drift.

Measurements for the reference voltage count are

equated to the voltage value stored into EPROM during

calibration. All other channel measurements are

compensated for by ratioing the actual count with the

bandgap count and multiplying by the bandgap voltage

value stored in EPROM. Since all measurements are

relative to the reference, offset voltages inherent in the

comparator are cancelled out. See AN624, “PIC14000

A/D Theory and Implementation” for further details of

A/D operation.

The analog components used in the conversion and

the A/D timer can be disabled during idle periods for

maximum power savings. Power-saving can be

achieved

via

software

and/or

hardware

control

(Section 10.8).

8.3

A/D Timer (ADTMR) Module

The A/D timer (ADTMR) is comprised of a 16-bit up

timer, which is incremented every oscillator cycle.

ADTMR is reset to 0000h by a power-up reset; other-

wise the software must initialize it after each conver-

sion. A separate 16-bit capture register (ADCAP) is

used to capture the ADTMR count if an A/D capture

event occurs (see below). Both the A/D timer and cap-

ture register are readable and writable. The low byte of

the A/D timer (ADTMRL) is accessed at location 0Eh

while the high byte (ADTMRH) is accessed at location

0Fh. Similarly, the low byte of the A/D capture register

(ADCAP) is accessed at location 15h, and the high byte

is located at 16h.

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