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PIC14000 Datasheet(PDF) 17 Page - Microchip Technology |
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PIC14000 Datasheet(HTML) 17 Page - Microchip Technology |
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17 / 153 page ![]() © 1996 Microchip Technology Inc. Preliminary DS40122B-page 17 PIC14000 4.2.2.1 STATUS REGISTER The STATUS register, shown in Figure 4-3, contains the arithmetic status of the ALU, the RESET status and the bank select bits for data memory. The STATUS register can be the destination for any instruction, as with any other register. If the STATUS register is the destination for an instruction that affects the Z, DC or C bits, then the write to these three bits is disabled. These bits are set or cleared according to the device logic. Furthermore, the TO and PD bits are not writable. Therefore, the result of an instruction with the STATUS register as destination may be different than intended. For example, CLRF STATUS will clear the upper-three bits and set the Z bit. This leaves the STATUS register as 000u u1uu (where u = unchanged). It is recommended, therefore, that only BCF, BSF, SWAPF and MOVWF instructions are used to alter the STATUS register because these instructions do not affect the Z, C or DC bits from the STATUS register. For other instructions, not affecting any status bits, see the “Instruction Set Summary.” Note 1: The IRP and RP1 bits (STATUS<7:6>) are not used by the PIC14000 and should be programmed as cleared. Use of these bits as general purpose R/W bits is NOT recommended, since this may affect upward compatibility with future products. Note 2: The C and DC bits operate as a borrow and digit borrow out bit, respectively, in subtraction. See the SUBLW and SUBWF instructions for examples. FIGURE 4-3: STATUS REGISTER 83h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 STATUS IRP RP1 RP0 TO PD Z DC C Read/Write R/W R/W R/W R R R/W R/W R/W POR value FFh 0 0 011 X X X Bit Name Function B7 IRP Not used. This bit should be programmed as ‘0’. Use of this bit as a general purpose read/write bit is not recommended, since this may affect upward compatibility with future products. B6 RP1 Not used. This bit should be programmed as ‘0’. Use of this bit as a general purpose read/write bit is not recommended, since this may affect upward compatibility with future products. B5 RP0 Register page select for direct addressing. 1 = Bank1 (80h - FFh) 0 = Bank0 (00h - 7Fh) Each page is 128 bytes. Only the RP0 bit is used. B4 TO Time-out bit. 1 = After power-up and by the CLRWDT and SLEEP instruction. 0 = A watchdog timer time-out has occurred. B3 PD Power down bit. 1 = After power-up or by a CLRWDT instruction. 0 = By execution of the SLEEP instruction. B2 Z Zero bit. 1 = The result of an arithmetic or logic operation is zero. 0 = The result of an arithmetic or logical operation is not zero. B1 DC Digit carry / borrow bit. For ADDWF and ADDLW instructions. 1 = A carry-out from the 4th low order bit of the result. 0 = No carry-out from the 4th low order bit of the result. Note: For Borrow, the polarity is reversed. B0 C Carry / borrow bit. For ADDWF and ADDLW instructions. 1 = A carry-out from the most significant bit of the result occurred. Note that a subtraction is executed by adding the two’s complement of the second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of the source register. 0 = No carry-out from the most significant bit of the result. Note: For Borrow the polarity is reversed. |
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