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ADSP-TS101S Datasheet(PDF) 20 Page - Analog Devices |
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ADSP-TS101S Datasheet(HTML) 20 Page - Analog Devices |
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20 / 48 page ![]() Rev. C | Page 20 of 48 | May 2009 ADSP-TS101S SPECIFICATIONS Note that component specifications are subject to change with- out notice. OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS Parameter Test Conditions Min Typ Max Unit VDD Internal Supply Voltage 1.14 1.26 V VDD_A Analog Supply Voltage 1.14 1.26 V VDD_IO I/O Supply Voltage 3.15 3.45 V TCASE Case Operating Temperature –40 +85 ºC VIH High Level Input Voltage 1 1 Applies to input and bidirectional pins. @ VDD, VDD_IO = max 2 VDD_IO + 0.5 V VIL Low Level Input Voltage1 @ VDD, VDD_IO = min –0.5 +0.8 V IDD VDD Supply Current for Typical Activity 2 2 For details on internal and external power estimation, including: power vector definitions, current usage descriptions, and formulas, see EE-169, Estimating Power for the ADSP-TS101S on the Analog Devices website—use site search on “EE-169” (www.analog.com). This document is updated regularly to keep pace with silicon revisions. @ CCLK = 250 MHz, VDD =1.25 V, TCASE =25ºC 1.2 A IDD VDD Supply Current for Typical Activity 2 @ CCLK = 300 MHz, VDD =1.25 V, TCASE =25ºC 1.5 A IDDIDLELP VDD Supply Current for IDLELP Instruction Execution @ CCLK = 300 MHz, VDD =1.20 V, TCASE =25ºC 173 mA IDD_IO VDD_IO Supply Current for Typical Activity2 @ SCLK = 100 MHz, VDD_IO =3.3 V, TCASE =25ºC 137 mA IDD_A VDD_A Supply Current @ VDD =1.25 V, TCASE = 25ºC 25 31.25 mA VREF Voltage Reference 1.4 1.6 V Parameter Test Conditions Min Max Unit VOH High Level Output Voltage 1 1 Applies to output and bidirectional pins. @VDD_IO = min, IOH = –2 mA 2.4 V VOL Low Level Output Voltage1 @VDD_IO = min, IOL =4 mA 0.4 V IIH High Level Input Current2 2 Applies to input pins with internal pull-downs (pd). @VDD_IO =max, VIN =VDD_IO max 10 μA IIHP High Level Input Current (pd)2 @VDD_IO =max, VIN =VDD_IO max 17.2 44.5 μA IIL Low Level Input Current 3 3 Applies to input pins without internal pull-ups (pu). @VDD_IO =max, VIN =0 V 10 μA IILP Low Level Input Current (pu) 4 4 Applies to input pins with internal pull-ups (pu). @VDD_IO =max, VIN =0 V –69 –23 μA IOZH Three-State Leakage Current High 5, 6 5 Applies to three-stateable pins without internal pull-downs (pd). 6 Applies to open drain (od) pins with 500 pull-ups (pu). @VDD_IO =max, VIN =VDD_IO max 10 μA IOZHP Three-State Leakage Current High (pd)7 7 Applies to three-stateable pins with internal pull-downs (pd). @VDD_IO =max, VIN =VDD_IO max 17.2 44.5 μA IOZL Three-State Leakage Current Low8 8 Applies to three-stateable pins without internal pull-ups (pu). @VDD_IO =max, VIN =0 V 10 μA IOZLP Three-State Leakage Current Low (pu)9 9 Applies to three-stateable pins with internal pull-ups (pu). @VDD_IO =max, VIN =0 V –69 –23 μA IOZLO Three-State Leakage Current Low (od) 7 @VDD_IO =max, VIN = 0 V –9.8 –4.6 mA CIN Input Capacitance 10, 11 10Applies to all signals. 11Guaranteed but not tested. @fIN =1 MHz, TCASE = 25ºC, VIN =2.5 V 5 pF |
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