DS2154 datasheet(60/87 Pages) DALLAS

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DS2154

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11.3 INTERNAL REGISTER SCHEME BASED ON CRC4 MULTIFRAME

On the receive side, there is a set of eight registers (RSiAF, RSiNAF, RRA, RSa4 to RSa8) that report the

Si and Sa bits as they are received. These registers are updated with the setting of the Receive CRC4

Multiframe bit in Status Register 2 (SR2.1). The host can use the SR2.1 bit to know when to read these

registers. The user has 2 ms to retrieve the data before it is lost. The MSB of each register is the first

received. Please see the register descriptions below and the Transmit Data Flow diagram in Section 13 for

more details.

On the transmit side, there is also a set of eight registers (TSiAF, TSiNAF, TRA, TSa4 to TSa8) that can

be programmed to insert both Si and Sa data via the Transmit Sa Bit Control Register (TSaCR). Data is

sampled from these registers with the setting of the Transmit Multiframe bit in Status Register 2 (SR2.5).

The host can use the SR2.5 bit to know when to update these registers. It has 2 ms to update the data or

else the old data will be retransmitted. The MSB of each register is the first bit transmitted. Please see the

NAME

ADDRESS

(HEX)

FUNCTION

RSiAF

The 8 Si bits in the align frame

RSiNAF

The 8 Si bits in the non-align frame

RRA

The 8 reportings of the receive remote alarm (RA)

RSa4

The 8 Sa4 reported in each CRC4 multiframe

RSa5

The 8 Sa5 reported in each CRC4 multiframe

RSa6

The 8 Sa6 reported in each CRC4 multiframe

RSa7

The 8 Sa7 reported in each CRC4 multiframe

RSa8

The eight Sa8 reported in each CRC4 multiframe

TSiAF

The 8 Si bits to be inserted into the align frame

TSiNAF

The 8 Si bits to be inserted into the non-align frame

TRA

The 8 settings of remote alarm (RA)

TSa4

The 8 Sa4 settings in each CRC4 multiframe

TSa5

The 8 Sa5 settings in each CRC4 multiframe

TSa6

The 8 Sa6 settings in each CRC4 multiframe

TSa7

The 8 Sa7 settings in each CRC4 multiframe

TSa8

The 8 Sa8 settings in each CRC4 multiframe

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