TLK111 datasheet(41/110 Pages) TI1

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RD–

RD+

49.9 W

Vdd

0.1 F

TD–

TD+

49.9 W

Vdd

0.1 F

1:1

RJ45

Place resistors and capacitors close to the device.

Common-mode chokes

may be required.

Note: Center tap is connected to Vdd

* Place capacitors close to the

transformer center taps

All values are typical and are 1%

0.1 F*

1 F

TLK111

www.ti.com

SLLSEF8B – AUGUST 2013 – REVISED JANUARY 2014

Design Guidelines

7.1

TPI Network Circuit

Figure 7-1 shows the recommended circuit for a 10/100Mbs twisted pair interface. Below is a partial

list of recommended transformers. Variations with PCB and component characteristics require that

the application be tested to verify that the circuit meets the requirements of the intended application.

•

Pulse H1102

•

Pulse HX1198

Figure 7-1. 10/100Mbs Twisted Pair Interface

7.2

Clock In (XI) Requirements

The TLK111 supports an external CMOS-level oscillator source or an internal oscillator with an external

crystal.

7.2.1

Oscillator

If an external clock source is used, XI should be tied to the clock source and XO should be left floating.

The amplitude of the oscillator should be a nominal voltage of 3.3V.

Design Guidelines

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