82374EB datasheet(150/208 Pages) INTEL

150 / 208 page

82374EB82374SB

If a counter is programmed to readwrite two-byte counts the following precaution applies A program must

not transfer control between writing the first and second byte to another routine which also writes into that

same counter Otherwise the counter will be loaded with an incorrect count The count must always be

completely loaded with both bytes

Read Operations

It is often desirable to read the value of a Counter without disturbing the count in progress This is easily done

in the ESC timer units

There are three possible methods for reading the counters a simple read operation the Counter Latch

Command and the Read-Back Command

Counter IO Port Read

The first method is to perform a simple read operation To read the Counter the CLK input of the selected

Counter must be inhibited by using either the GATE input or external logic Otherwise the count may be in the

process of changing when it is read giving an undefined result When reading the count value directly follow

the format programmed in the control register read LSB read MSB or read LSB then MSB Within the ESC

timer unit the GATE input on Timer 1 Counter 0 Counter 1 and Timer 2 Counter 0 are tied high Therefore the

direct register read should not be used on these two counters The GATE input of Timer 1 Counter 2 is

controlled through IO port 061h If the GATE is disabled through this register direct IO reads of port 042h

will return the current count value

Counter Latch Command

The Counter Latch command latches the count at the time the command is received This command is used to

insure that the count read from the counter is accurate (particularly when reading a two-byte count) The count

value is then read from each counter’s Count register as was programmed by the Control register

The selected Counter’s output latch (OL) latches the count at the time the Counter Latch Command is

received This count is held in the latch until it is read by the CPU (or until the Counter is reprogrammed) The

count is then unlatched automatically and the OL returns to ‘‘following’’ the counting element (CE) This allows

reading the contents of the Counters ‘‘on the fly’’ without effecting counting in progress Multiple Counter

Latch Commands may be used to latch more than one Counter Each latched Counter’s OL holds its count

until it is read Counter Latch Commands do not effect the programmed Mode of the Counter in any way The

Counter Latch Command can be used for each counter in the ESC timer unit

If a Counter is latched and then some time later latched again before the count is read the second Counter

Latch Command is ignored The count read will be the count at the time the first Counter Latch Command was

issued

With either method the count must be read according to the programmed format specifically if the Counter is

programmed for two byte counts two bytes must be read The two bytes do not have to be read one right after

the other read write or programming operations for other Counters may be inserted between them

Another feature of the ESC timer unit is that reads and writes of the same Counter may be interleaved For

example if the Counter is programmed for two byte counts the following sequence is valid

1 Read least significant byte

2 Write new least significant byte

3 Read most significant byte

4 Write new most significant byte

150

82374EB Datasheet(PDF) 150 Page - Intel Corporation

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