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82374EB Datasheet(PDF) 153 Page - Intel Corporation |
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82374EB Datasheet(HTML) 153 Page - Intel Corporation |
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153 / 208 page ![]() 82374EB82374SB Table 24 Typical Interrupt Functions Priority Label Controller Typical Interrupt Source 1 IRQ0 1 Interval Timer 1 Counter 0 OUT 2 IRQ1 1 Keyboard 3-10 IRQ2 1 Interrupt from Controller 2 3 IRQ8 2 Real Time Clock 4 IRQ9 2 Expansion Bus Pin B04 5 IRQ10 2 Expansion Bus Pin D03 6 IRQ11 2 Expansion Bus Pin D04 7 IRQ12 2 Expansion Bus Pin D05 8 IRQ13 2 Coprocessor Error Chaining 9 IRQ14 2 Fixed Disk Drive Controller Expansion Bus Pin D07 10 IRQ15 2 Expansion Bus Pin D06 11 IRQ3 1 Serial Port 2 Expansion Bus B25 12 IRQ4 1 Serial Port 1 Expansion Bus B24 13 IRQ5 1 Parallel Port 2 Expansion Bus B23 14 IRQ6 1 Diskette Controller Expansion Bus B22 15 IRQ7 1 Parallel Port 1 Expansion Bus B21 91 Interrupt Controller Internal Registers Several registers are contained internally within each 82C59 The interrupts at the IRQ input lines are handled by two registers in cascade the Interrupt Request Register (IRR) and the In-Service Register (ISR) The IRR is used to store all the interrupt levels which are requesting service and the ISR is used to store all the interrupt levels which are being serviced Internal circuitry determines the priorities of the bits set in the IRR The highest priority is selected and strobed into the corresponding bit of the ISR during Interrupt Acknowledge Cycles The Interrupt Mask Register (IMR) stores the bits which mask the incoming interrupt lines The IMR operates on the IRR Masking of a higher priority input will not effect the interrupt request lines of lower priority inputs 92 Interrupt Sequence The powerful features of the Interrupt Controller in a microcomputer system are its programmability and the interrupt routine addressing capability The latter allows direct or indirect jumping to the specific interrupt routine requested without any polling of the interrupting devices The following shows the interrupt sequence for an x86 type system (the 8080 mode of the interrupt controller must never be selected when programming the ESC) 153 |
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