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82503 Datasheet(PDF) 11 Page - Intel Corporation

Part # 82503
Description  DUAL SERIAL TRANSCEIVER (DST)
PDF  45 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82503 Datasheet(HTML) 11 Page - Intel Corporation

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82503
290421 – 4
Figure 5 TPE Predistortion
33 Receive Blocks
331 MANCHESTER DECODER AND CLOCK
RECOVERY
The 82503 performs Manchester decoding and tim-
ing recovery of the incoming data in AUI and TPE
modes
The Manchester-encoded data stream is decoded to
separate the Receive Clock (RxC) and the Receive
Data (RxD) from the differential signal The 82503
uses an advanced digital technique to perform the
decoding function The use of digital circuitry instead
of analog circuitry (eg
a phase-lock loop) to per-
form the decoding ensures that the decoding func-
tion is less sensitive to variations in operating condi-
tions
A high-resolution phase reference is used to digitize
the phase of the incoming data bit-center transition
The digitizer has a phase resolution of 132 of a bit
time
The digitized phase is filtered by a digital low-pass
filter to remove rapid phase variations ie
phase
jitter Slow phase variations such as those caused
by small differences between the data frequency
and the clock frequency are not filtered by the low-
pass filter
The RxC generator digitally sets the phases of the
two RxC transitions to respectively lead and lag the
bit-center transition by
bit time RxC is used to
recover RxD by sampling the incoming data with an
edge-triggered flip-flop
Lock is achieved by reducing the time constant of
the digital filter to zero at the start of a new frame
Any uncertainty in the bit-center phase of the first
transition that is caused by jitter is subsequently re-
moved by gradually increasing the filter time con-
stant during the following preamble By that time the
phase of the bit center is output by the filter and
lock is achieved Lock is achieved within the first 14
bit times as seen by the AUI inputs The maximum
bit-cell timing distortion (jitter) tolerated by the Man-
chester decoder circuitry is g12 ns (preamble)
g
18 ns (data) for AUI and g135 ns for TPE (data
and preamble)
11



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