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82802AB Datasheet(PDF) 19 Page - Intel Corporation |
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82802AB Datasheet(HTML) 19 Page - Intel Corporation |
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19 / 53 page ![]() Intel ® 82802AB/AC Firmware Hub R Datasheet 19 4. Functional Descriptions When the VPP voltage ≤ VPPLK, read operations from the status register, identifier codes or memory are enabled, but programming and erase functions are disabled. Placing VPPH1/2 on VPP enables successful block erase and program operations. Table 2. Command Definitions First Bus Cycle Second Bus Cycle Command Bus Cycles Required Notes Oper. Addr.(1) Data(2) Oper. Addr.(1) Data(2) Read Array/Reset 1 Write X FFh Read Identifier Codes ≥ 2 2 Write X 90h Read IA ID Read Status Register 2 Write X 70h Read X SRD Clear Status Register 1 Write X 50h Block Erase 2 3 Write BA 20h Write BA D0h Program 2 3,4 Write WA 40h or 10h Write WA WD Block Erase and Program Suspend 1 3 Write X B0h Block Erase and Program Resume 1 3 Write X D0h Note: 1. Key: X = Any valid address within the device IA = Identifier Code Address BA = Address within the block being erased WA = Address of memory location to be written SRD = Data read from status register. WD = Data to be written at location WA ID = Data read from identifier codes 2. Following the Read Identifier Codes command, read operations access manufacturer and device. See Table 4 for the read identifier code data. 3. The block must not be write locked when attempting block erase or program operations. Attempts to issue a block erase or program to a write-locked block will fail. 4. Either 40h or 10h are recognized by the WSM as the program setup. Note: Commands other than those shown previously are reserved by Intel for future device implementations and should not be used. |
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