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TSI721 Datasheet(PDF) 17 Page - Integrated Device Technology

Part # TSI721
Description  This document uses the following conventions
PDF  68 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

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1. Device Overview > Typical Applications
Tsi721 Datasheet
17
May 5, 2014
Formal Status
This document is confidential and is subject to an NDA.
Integrated Device Technology
1.4.2
Video and Imaging Application
In video and imaging applications, system designers need to cluster large numbers of DSPs or FPGAs to perform
encoding/decoding/trans coding, or do FFTs (Fast Fourier Transform) on large arrays of data. The RapidIO protocol is optimal
for this DSP/FPGA cluster requirement. However, the analog front-end to the system is usually a sensor with streaming data
terminated in an FPGA (for example, a camera subsystem). This is usually in an PCIe network, often with a PC back-end. In
these applications the designer needs to bridge between a PCIe network and the RapidIO DSP/FPGA cluster. The Tsi721 is
ideal for this application.
Figure 3: Video and Imaging Application
1.4.3
Wireless Application
In wireless base stations, the incumbent interconnect technology in the baseband processing cards – LTE, WiMAX, WCDMA,
and TD-SCDMA – is RapidIO. RapidIO connects a cluster of DSPs, processor, and FPGA, locally on the baseband processor
for MAC and PHY layer processing. However, the LTE standard pushes the performance available in existing RapidIO enabled
microprocessors.
The Tsi721 provides wireless OEMs with an additional option to use an x86 processor with superior MIPs in a baseband card
that is predominantly RapidIO. In these card designs, RapidIO is the interconnect between devices and functions as the
backplane interconnect. x86 processors can now be used with other RapidIO devices on the baseband card and leverage the
messaging performance of RapidIO for this peer-to-peer multiprocessor network.
Tsi721
PCIe to
S-RIO
x4 PCIe
x4 S-RIO
DSP/FPGA
S-RIO
x4 S-RIO
x4 S-RIO
DSP/FPGA
S-RIO
x4 S-RIO
DSP/FPGA
S-RIO
x4 S-RIO
DSP/FPGA
S-RIO
IDT Clock
156.25
MHz
RapidIO Switch
(CPS-1848,
CPS-1616,
Tsi578)



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