LM5037

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SNVS578D – NOVEMBER 2008 – REVISED MAY 2015

Feature Description (continued)

CS filter must be placed very close to the device and connected directly to the CS and AGND pins. If a sense

resistor located in the source of the main MOSFET switch is used for current sensing, a low inductance type of

resistor is required. When designing with a current sense resistor, all the noise sensitive, low power ground

connections should be connected together near the AGND pin, and a single connection should be made to the

power ground (sense resistor ground point).

7.3.5 Soft-Start Sequence

The soft-start circuit allows the regulator to gradually reach a steady state operating point, thereby reducing start-

up stresses and current surges. When bias is supplied to the LM5037, the SS pin capacitor is discharged by an

internal MOSFET. When the UVLO, VCC and REF pins reach their operating thresholds, the SS capacitor is

released and charged with a 100 µA current source. The PWM comparator control voltage at the COMP pin is

clamped to the SS pin voltage by an internal amplifier. When the PWM comparator input reaches 1 V, output

pulses commence with slowly increasing duty cycle. The voltage at the SS pin eventually increases to 5 V, while

the voltage at the PWM comparator increases to the value required for regulation as determined by the voltage

feedback loop.

One method to disable the regulator is to ground the SS pin. This forces the internal PWM control signal to

ground, reducing the output duty cycle quickly to zero. Releasing the SS pin initiates a soft-start sequence and

normal operation resumes. A second shutdown method is discussed in the Thermal Protection section.

7.3.6 PWM Comparator

The pulse width modulation (PWM) comparator compares the voltage ramp signal at the RAMP pin to the loop

error signal. The loop error signal is derived from the internal error amplifier (COMP pin). The resulting control

voltage passes through a 1-V level shift before being applied to the PWM comparator. This comparator is

optimized for speed in order to achieve minimum controllable duty cycles. The common mode input voltage

range of the PWM comparator is from 0 V to 4.3 V.

7.3.7 Modulation Ramp

The voltage at the RAMP pin provides the modulation ramp for the PWM comparator. The PWM comparator

compares the modulation ramp signal at the RAMP pin to the loop error signal to control the output duty cycle.

The modulation ramp can be implemented either as a ramp proportional to input voltage, known as feed-forward

voltage mode control, or as a ramp proportional to the primary current, known as current mode control. The

configure the RAMP pin for either voltage mode or current mode allows the controller to be implemented for the

optimum control method for the selected power stage topology. Configuring RAMP pin is explained below and

the differences between voltage mode control and current mode control in various double-ended topologies is

explained in Application Information section.

7.3.8 Feed-Forward Voltage Mode

the PWM ramp signal as shown in Figure 12. It can be seen that the slope of the signal at RAMP varies in

proportion to the input line voltage. This varying slope provides line feed-forward information necessary to

improve line transient response with voltage mode control. The RAMP signal is compared to the error signal by

the pulse width modulator comparator to control the duty cycle of the outputs. With a constant error signal, the

the signal driving RAMP pin must not exceed the common mode input voltage range of the PWM comparator

(3.3 V) while in normal operation.

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