LM5037MTSLASHNOPB datasheet(24/40 Pages) TI

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1.25V

STANDBY

0.45V

SHUTDOWN

VIN

5.0V

UVLO

22 2A

LM5037

R1 = VHYS -

22 2A

R2 =

1.25 x R1

VPWR - 1.25

20 x 10

-3 x V

PWR

1.25

Rslope =

-1

FOSC x Cslope x In

Slope-Comp

1 -

VREF

- Rfilter

LM5037

SNVS578D – NOVEMBER 2008 – REVISED MAY 2015

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Application Information (continued)

Rslope can be selected from the following formula:

(8)

For example, with a Cslope of 1500 pF, FOSC of 250 kHz, reference voltage of 5V (VREF), slope compensation of

80 mV and Rfilter = 25Ω results in Rslope value of 165 kΩ.

8.1.4 UVLO Divider Selection

A dedicated comparator connected to the UVLO pin detects an input under-voltage condition. When the UVLO

pin voltage is below 0.45 V, the LM5037 controller is in a low current shutdown mode. For a UVLO pin voltage

greater than 0.45 V but less than 1.25 V, the controller is in standby mode with VCC and REF regulators active

but no switching. Once the UVLO pin voltage is greater than 1.25 V, the controller is fully enabled. When the

UVLO pin voltage rises above the 1.25-V threshold, an internal 22-µA current source as shown in Figure 24, is

activated thus providing threshold hysteresis. The 22-µA current source is deactivated when the voltage at the

UVLO pin falls below 1.25 V. Use Equation 9 to calculate resistance values for R1 and R2.

where

•

VPWR is the desired turn-on voltage

•

VHYS is the desired UVLO hysteresis at VPWR

(9)

Figure 24. Basic UVLO Configuration

For example, if the device is to be enabled when VPWR reaches 33 V, and disabled when VPWR decreases to 30

V, R1 is 113 k

Ω, and R2 is 4.42 kΩ.

CAUTION

Do not allow the voltage at the UVLO pin to exceed 7 V at any time.

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