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CAP1188 Datasheet(PDF) 62 Page - Microchip Technology |
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CAP1188 Datasheet(HTML) 62 Page - Microchip Technology |
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62 / 79 page ![]() CAP1188 DS00001620C-page 62 2015 Microchip Technology Inc. The LED Direct Ramp Rates register control the rising and falling edge time of an LED that is configured to operate in Direct behavior mode. The rising edge time corresponds to the amount of time the LED takes to transition from its min- imum duty cycle to its maximum duty cycle. Conversely, the falling edge time corresponds to the amount of time that the LED takes to transition from its maximum duty cycle to its minimum duty cycle. Bits 5 - 3 - RISE_RATE[2:0] - Determines the rising edge time of an LED when it transitions from its minimum drive state to its maximum drive state as shown in Table 6-62. Bits 2 - 0 - FALL_RATE[2:0] - Determines the falling edge time of an LED when it transitions from its maximum drive state to its minimum drive state as shown in Table 6-62. 6.38 LED Off Delay Register The LED Off Delay register determines the amount of time that an LED remains at its maximum duty cycle (or minimum as determined by the polarity controls) before it starts to ramp down. If the LED is operating in Breathe mode, this delay is applied at the top of each “breath”. If the LED is operating in the Direct mode, this delay is applied when the LED is unactuated. Bits 6 - 4 - BR_OFF_DLY[2:0] - Determines the Breathe behavior mode off delay, which is the amount of time an LED in Breathe behavior mode remains inactive after it finishes a breathe pulse (ramp on and ramp off), as shown in Figure 6- 5 (non-inverted polarity LEDx_POL = 1) and Figure 6-6 (inverted polarity LEDx_POL = 0). Available settings are shown in Table 6-64. TABLE 6-62: RISE / FALL RATE DECODE RISE_RATE/ FALL_RATE/ Bit Decode Rise / Fall Time (TRISE / TFALL) 21 0 00 0 0 0 0 1 250ms 0 1 0 500ms 0 1 1 750ms 10 0 1s 1 0 1 1.25s 1 1 0 1.5s 11 1 2s TABLE 6-63: LED OFF DELAY REGISTER ADDR R/W Register B7 B6 B5 B4 B3 B2 B1 B0 Default 95h R/W LED Off Delay Register - BR_OFF_DLY[2:0] DIR_OFF_DLY[3:0] 00h |
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