Electronic Components Datasheet Search
  English  ▼

X  

UCC24636DBVT Datasheet(PDF) 18 Page - Texas Instruments

Click here to check the latest version.
Part # UCC24636DBVT
Description  Synchronous Rectifier (SR) Controller
PDF  35 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

UCC24636DBVT Datasheet(HTML) 18 Page - Texas Instruments

Back Button UCC24636DBVT Datasheet HTML 14Page - Texas Instruments UCC24636DBVT Datasheet HTML 15Page - Texas Instruments UCC24636DBVT Datasheet HTML 16Page - Texas Instruments UCC24636DBVT Datasheet HTML 17Page - Texas Instruments UCC24636DBVT Datasheet HTML 18Page - Texas Instruments UCC24636DBVT Datasheet HTML 19Page - Texas Instruments UCC24636DBVT Datasheet HTML 20Page - Texas Instruments UCC24636DBVT Datasheet HTML 21Page - Texas Instruments UCC24636DBVT Datasheet HTML 22Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 18 / 35 page
background image
18
UCC24636
SLUSCG2A – MARCH 2016 – REVISED MARCH 2016
www.ti.com
Product Folder Links: UCC24636
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Feature Description (continued)
8.3.4 Pin Fault Protection
The UCC24636 controller includes fault protection in the event of open pin, shorted pin to ground and abnormal
out of range operation.
8.3.4.1 VPC Pin Overvoltage
In the event that there is an abnormal high level on the VPC pin for a period beyond expected transformer
leakage spike duration, the DRV output is disabled on a cycle-to-cycle basis. If the voltage on the VPC pin
exceeds VVPCDIS, 2.6 V minimum, for 500 ns the SR is not enabled until the next valid cycle.
8.3.4.2 VPC Pin Open
In the event of an open circuit VPC pin, the device defaults to a zero VPC input signal condition which results in
disabling DRV operation.
8.3.4.3 VSC Pin Open
In the event of an open circuit VSC pin, the device defaults to a zero VSC input signal condition which results in
disabling DRV operation.
8.3.4.4 TBLK Pin Open
In the event of an open circuit TBLK pin, the device disables DRV operation.
8.3.4.5 VPC and VSC Short to Ground
Since the VPC and VSC enable thresholds must be satisfied for DRV operation, DRV is inherently disabled.
8.3.4.6 TBLK Pin Short to Ground
A shorted TBLK pin results in a minimum setting for tVPC-BLK blanking time.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com