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UCC24636DBVT Datasheet(PDF) 18 Page - Texas Instruments |
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UCC24636DBVT Datasheet(HTML) 18 Page - Texas Instruments |
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18 / 35 page ![]() 18 UCC24636 SLUSCG2A – MARCH 2016 – REVISED MARCH 2016 www.ti.com Product Folder Links: UCC24636 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Feature Description (continued) 8.3.4 Pin Fault Protection The UCC24636 controller includes fault protection in the event of open pin, shorted pin to ground and abnormal out of range operation. 8.3.4.1 VPC Pin Overvoltage In the event that there is an abnormal high level on the VPC pin for a period beyond expected transformer leakage spike duration, the DRV output is disabled on a cycle-to-cycle basis. If the voltage on the VPC pin exceeds VVPCDIS, 2.6 V minimum, for 500 ns the SR is not enabled until the next valid cycle. 8.3.4.2 VPC Pin Open In the event of an open circuit VPC pin, the device defaults to a zero VPC input signal condition which results in disabling DRV operation. 8.3.4.3 VSC Pin Open In the event of an open circuit VSC pin, the device defaults to a zero VSC input signal condition which results in disabling DRV operation. 8.3.4.4 TBLK Pin Open In the event of an open circuit TBLK pin, the device disables DRV operation. 8.3.4.5 VPC and VSC Short to Ground Since the VPC and VSC enable thresholds must be satisfied for DRV operation, DRV is inherently disabled. 8.3.4.6 TBLK Pin Short to Ground A shorted TBLK pin results in a minimum setting for tVPC-BLK blanking time. |
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