DP83256 datasheet(60/146 Pages) TI1

60 / 146 page

50 Registers (Continued)

515 NOISE PRESCALE THRESHOLD REGISTER (NPTR)

The Noise Prescale Threshold Register contains the start value for the Noise Prescale Timer This threshold register is used in

conjunction with the Noise Threshold register for setting the maximum allowable time between entry to ILS HLS MLS ALS or

NSD The Noise timer is used to implement the TNE timing requirement of PCM The Noise Prescale threshold controls how

often the Noise timer is decremented When the Noise Prescale Timer reaches zero it reloads the count with the contents of the

Noise Prescale Threshold Register and also causes the Noise Timer to decrement

The threshold values for the Noise Counter and Noise Prescale Counter are simultaneously loaded into both counters if one of

the following conditions is true

1 Both the Noise Counter and Noise Prescale Counter reach zero and the current Line State is either Noise Line State Active

Line State or Line State Unknown

2 The Current Line State is either Halt Line State Idle Line State Master Line State Quiet Line State or No Signal Detect

3 The Noise Threshold Register or Noise Prescale Threshold Register goes through a Control Bus Interface write cycle

In addition the value of the Noise Prescale Threshold Register is loaded into the Noise Prescale Counter if the Noise Prescale

Counter reaches zero

The Noise Counter and Noise Prescale Counter will continue to count without resetting or reloading the threshold values if a

Line State change occurs and the new line state is either Noise Line State Active Line State or Line State Unknown

When both the Noise Threshold Counter and Noise Counter both reach zero the Noise Threshold bit of the Receive Condition

See the NTR register description for default value recommendations

ACCESS RULES

ADDRESS

READ

WRITE

0Eh

Always

NPT7

NPT6

NPT5

NPT4

NPT3

NPT2

NPT1

NPT0

Bit

Symbol

Description

D0-D7

NPT0-NPT7

NOISE PRESCALE THRESHOLD BITk0-7l

Start value for the Noise Prescale Timer

NPT0 is the Least Significant Bit (LSB)

DP83256 Datasheet(PDF) 60 Page - Texas Instruments